描述 Description

High-Bandwidth's SY89426 Multi-Output Phase Locked Loop (PLL) is a SONET compliant clock generator providing 622.08MHz, 155.52MHz and retimed reference clock outputs. The PLL produces low jitter OC-12/STS-12 and OC-3/STS-3 rate clocks from an input reference clock of 38.88, 51.84, or 77.76MHz. Additionally, the input reference clock is retimed and provided as a TTL/CMOS compatible output, which may be disabled to minimize switching noise. The SY89426 operates from a single +5 volt supply, and requires only a simple series RC loop filter.Coupling High-Bandwidth's advanced PLL technology with our proprietary ASSET? bipolar process has produced a clock generator IC which exceeds applicable Bellcore and ANSI specifications, while setting a new standard for performance and flexibility.

特性 Features

·Single chip source for 622.08MHz and 155.52MHz clocks
·622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL
·TTL/CMOS compatible inputs and reference output
·SONET compliant jitter performance (≤0.01UI)
·Choice of three reference frequencies
·Only 395mW (typ)
·Complies with Bellcore, CCITT and ANSI standards
·Single +5 volt power supply
·Fully compatible with industry standard 10KH I/O levels
·Available in 28-pin PLCC package
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簡介

SY89426屬于集成電路（IC）的時鐘發(fā)生器PLL頻率合成器。由制造生產(chǎn)的SY89426時鐘發(fā)生器，PLL，頻率合成器時鐘發(fā)生器、PLL 和頻率合成器集成電路 (IC) 可為邏輯器件提供參考信號的穩(wěn)定定時脈沖，這些器件包括計算機、微控制器、數(shù)據(jù)通信系統(tǒng)和圖形/視頻發(fā)生器。這些集成電路可能包括緩沖器、驅動器、分頻器、倍頻器、多路復用器、合成器、扇出分配器和預分頻器。