描述 Description

The SY89325V is a fully differential, CML/PECL/LVPECLto-LVDS translator. It achieves LVDS signaling up to 1.5Gbps and clock rates of 750MHz, depending of the distance and the characteristics of the media and noise coupling sources. LVDS is intended to drive 50Ω impedance transmission line media such as PCB traces, backplanes, or cables.SY89325V inputs can be terminated with a single resistor between the true and complement pins of the input.The SY89325V is a member of Micrel's Precision Edge??family of high-speed logic devices. This family features ultra-small packaging, high signal integrity, and operation at many different supply voltages. For applications that require dual translators, consider the SY55855V.

特性 Features

? Guaranteed AC performance over temp and voltage:
? DC-to >1.5Gbps data rate throughput
? >750MHz clock fMAX
? <50ps within-device skew
? Ultra-low jitter design:
? <1psRMS?random jitter
? <10psPP?deterministic jitter
? <1psRMS?cycle-to-cycle jitter
? <10psPP?total jitter (clock)
? Accepts CML, PECL, LVPECL inputs
? 350mV LVDS output swing
? Power supply 3.3V ±10% or 5.0V ±10%
? -40°C to +85°C temperature range
? Available in ultra-small (2mm x 2mm) 8-pin MLF??package

簡(jiǎn)介

SY89325V屬于集成電路（IC）的轉(zhuǎn)換器電平移位器。由制造生產(chǎn)的SY89325V轉(zhuǎn)換器，電平移位器邏輯轉(zhuǎn)換器或電平移位器 IC 可用于在數(shù)字邏輯設(shè)備之間傳遞信息，這些設(shè)備可在不同/不兼容的供電電壓下工作，或可實(shí)現(xiàn)不同的信令方式。例如，可以將需要 5 V 電源的數(shù)字輸出傳感器連接到具有 3.3 V I/O 電源的 FPGA，或者在 CMOS 或 TTL 等單端信令方式與 PECL 或 LVDS 等差分技術(shù)之間進(jìn)行轉(zhuǎn)換。