描述 Description

The SY89251V is a differential PECL/ECL receiver/buffer in a space saving (2mm x 2mm) DFN package. The device is functionally equivalent to the SY100EL16VC, except for an active HIGH enable pin and a 70% smaller footprint. It is also equivalent to the SY89250V, except for an active HIGH enable pin. It provides a VBB?output for either single-ended application or as a DC bias for AC-coupling to the device.The SY89251V provides an EN input which is synchronized with the data input (D) signal in a way that provides glitchless gating of the QHG?and /QHG?outputs. When the EN signal is HIGH, the input is passed to the outputs and the data output equals the data input. When the data input is HIGH and the EN goes LOW, it will force the QHG?LOW and the /QHG?HIGH on the next negative transition of the data input. If the data input is LOW when the EN goes LOW, the next data transition to a HIGH is ignored and QHG?remains LOW and /QHG?remains HIGH. The next positive transition of the data input is not passed on to the data outputs under these conditions. The QHG?and /QHG?outputs remain in their disabled state as long as the EN input is held LOW. The EN input has no influence on the /Q output and the data input is passed on (inverted) to this output whether EN is HIGH or LOW. This configuration is ideal for crystal oscillator applications, where the oscillator can be free running and gated on and off synchronously without adding extra counts to the output.

特性 Features

? 3.3V and 5V power supply options
? 250ps propagation delay
? Ideal for pulse amplifier and limiting amplifier applications
? Data synchronous enable/disable (EN) on QHG?and /QHG?provides for complete glitchless gating of the outputs
? Ideal for gating timing signals
? Complete solution for high quality, high frequency crystal oscillator applications
? Available in an ultra-small 8-pin (2mm x 2mm) DFN package

簡(jiǎn)介

SY89251V屬于集成電路（IC）的專用邏輯器件。由制造生產(chǎn)的SY89251V專用邏輯器件專用邏輯 IC 設(shè)計(jì)提供應(yīng)用特定的邏輯輸出類型，例如 BCD 速率倍增、可尋址掃描端口、總線終端陣列、CML 驅(qū)動(dòng)器、比較器、ABT 掃描測(cè)試、二進(jìn)制全加法器、互補(bǔ)對(duì)加逆變器、可配置緩沖器、觸點(diǎn)顫動(dòng)消除器、晶體振蕩器、延遲元件、差分接收器、LVTTL 到 GTLP 收發(fā)器、存儲(chǔ)器解碼器、電源良好檢測(cè)器和分頻器。