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SY89871UMG數(shù)據(jù)手冊(cè)集成電路(IC)的時(shí)鐘緩沖器驅(qū)動(dòng)器規(guī)格書PDF

廠商型號(hào) |
SY89871UMG |
參數(shù)屬性 | SY89871UMG 封裝/外殼為16-VFQFN 裸露焊盤,16-MLF?;包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類別為集成電路(IC)的時(shí)鐘緩沖器驅(qū)動(dòng)器;產(chǎn)品描述:IC CLK BUFFER 1:3 2.5GHZ 16MLF |
功能描述 | Multiplexers Products |
封裝外殼 | 16-VFQFN 裸露焊盤,16-MLF? |
制造商 | Microchip Microchip Technology |
中文名稱 | 微芯科技 微芯科技股份有限公司 |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-26 14:14:00 |
人工找貨 | SY89871UMG價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SY89871UMG規(guī)格書詳情
描述 Description
The SY89871UMG is a 2.5V/3.3V LVPECL output precision clock divider capable of accepting a high-speed differential clock input (AC or DC-coupled) CML, LVPECL, HSTL or LVDS clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency locked lower speed version of the input clock (Bank B).Available divider ratios are 2, 4, 8 and 16. In a typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz, or 38MHz auxiliary clock components.The differential input buffer has a unique internal termination design that allows access to the termination network through a VT?pin. This feature allows the device to easily interface to different logic standards. A VREF-AC?reference is included for AC-coupled applications.The SY89871U includes two phase-matched output banks. Bank A (QA) is a frequency-matched copy of the input. Bank B (QB0, QB1) is a divided down output of the input frequency. Bank A and Bank B maintain a matched delay independent of the divider setting.
特性 Features
·Two matched-delay outputs:·Bank A: undivided pass-through (QA)
·Bank B: programmable divide by 2, 4, 8, 16 (QB0, QB1)
·Matched delay: all outputs have matched delay, independent of divider setting
·Guaranteed AC performance:·>2.5GHz fMAX
·<250ps tr/tf
·<670ps tpd?(matched delay)
·<15ps within-device skew
·Low jitter design·231fsRMS?phase jitter (typ.)
·Power supply 3.3V or 2.5V
·Unique patent-pending input termination and VT?pin for DC- and AC-coupled inputs: any differential inputs (LVPECL, LVDS, CML, HSTL)
·TTL/CMOS inputs for select and reset
·100K EP compatible LVPECL outputs
·Parallel programming capability
·Wide operating temperature range: -40°C to +85°C
·Available in 16-pin (3mm x 3mm) QFN package
簡介
SY89871UMG屬于集成電路(IC)的時(shí)鐘緩沖器驅(qū)動(dòng)器。由制造生產(chǎn)的SY89871UMG時(shí)鐘緩沖器,驅(qū)動(dòng)器時(shí)鐘緩沖器和驅(qū)動(dòng)器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號(hào)在系統(tǒng)中傳輸,常用作頻率/時(shí)間參考信號(hào),以同步系統(tǒng)內(nèi)的活動(dòng)。盡管這些器件最常用到的功能就是緩沖(即,為使信號(hào)不受驅(qū)動(dòng)負(fù)載的影響而從某個(gè)信號(hào)源復(fù)制信號(hào)),但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能,例如選擇性改變緩沖信號(hào)路徑、按某個(gè)整數(shù)值分割信號(hào)頻率,或進(jìn)行所用電信號(hào)格式轉(zhuǎn)換。
技術(shù)參數(shù)
更多- 制造商編號(hào)
:SY89871UMG
- 生產(chǎn)廠家
:Microchip
- Supply Voltage
:2.3 to 3.6V
- OE
:False
- RPE
:False
- FSI
:False
- Input Mux
:False
- Input EQ
:False
- Output Type
:LVPECL
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
MICREL |
20+ |
MLF16 |
19570 |
原裝優(yōu)勢(shì)主營型號(hào)-可開原型號(hào)增稅票 |
詢價(jià) | ||
MICROCHIP/微芯 |
2020+ |
TO-220AC |
100 |
只做原裝正品,賣元器件不賺錢交個(gè)朋友 |
詢價(jià) | ||
MICREL |
09+10+ |
MLF16 |
336 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
MICROCHIP/微芯 |
2022+ |
100 |
6600 |
只做原裝,假一罰十,長期供貨。 |
詢價(jià) | ||
MICREL/麥瑞 |
2223+ |
MLF16 |
26800 |
只做原裝正品假一賠十為客戶做到零風(fēng)險(xiǎn) |
詢價(jià) | ||
MICROCHIP |
25+ |
20000 |
原裝現(xiàn)貨,可追溯原廠渠道 |
詢價(jià) | |||
MICREL/麥瑞 |
2308+ |
QFN16 |
6800 |
十年專業(yè)專注 優(yōu)勢(shì)渠道商正品保證公司現(xiàn)貨 |
詢價(jià) | ||
Microchip |
12200 |
只做正品 |
詢價(jià) | ||||
MICREL |
24+ |
MLF-16P |
6868 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | ||
MICROCHIP(美國微芯) |
2021+ |
MLF-16 |
499 |
詢價(jià) |