描述 Description

The SY898531L is a 3.3V, low skew, 1:9 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin, the clock enable is synchronized with the input signal.The SY898531L operates from a 3.3V ±5% supply and is guaranteed over the full industrial temperature range of 0°C to +70°C. The SY898531L is part of Micrel’s highspeed, Precision Edge?product line.

特性 Features

? Provides nine differential 3.3V LVPECL copies
? Selects between differential CLK, /CLK or LVPECL clock inputs
? CLK, /CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL input levels
? PCLK, /PCLK pair accepts LVPECL, CML, SSTL input levels
? Guaranteed AC performance over temperature and supply voltage:
? 500MHz Maximum output frequency
? <2ns Propagation delay (In-to-Q)
? <50ps Output skew
? <250ps Part-to-part skew
? Additive phase jitter, RMS: 0.17ps (typical)
? 3.3V ±5% supply voltage
? 0°C to +70°C temperature operating range
? Available in a 32-pin TQFP package

簡介

SY898531L屬于集成電路（IC）的時(shí)鐘緩沖器驅(qū)動(dòng)器。由制造生產(chǎn)的SY898531L時(shí)鐘緩沖器，驅(qū)動(dòng)器時(shí)鐘緩沖器和驅(qū)動(dòng)器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號(hào)在系統(tǒng)中傳輸，常用作頻率/時(shí)間參考信號(hào)，以同步系統(tǒng)內(nèi)的活動(dòng)。盡管這些器件最常用到的功能就是緩沖（即，為使信號(hào)不受驅(qū)動(dòng)負(fù)載的影響而從某個(gè)信號(hào)源復(fù)制信號(hào)），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號(hào)路徑、按某個(gè)整數(shù)值分割信號(hào)頻率，或進(jìn)行所用電信號(hào)格式轉(zhuǎn)換。