描述 Description

The ZL40272 is 3x12 HCSL/LVDS/LVPECL clock fan out buffer with ultra-low additive jitter of 24fs capable of operating at frequencies up to 1.5 GHz. Using the 12 output ZL40272 and utilizing the individual output pins or I2C interface, you can create hot-swappable PCIe clocktrees. Applications include PCI Express generation 1/2/3/4/5 clock distribution, Intel QPI and UPI distribution, Servers, storage and data centers, switches and routers.

特性 Features

3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal
Twelve differential HCSL/LVDS/LVPECL outputs
Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency)
Supports clock frequencies from 0 to 1.5GHz
Supports 2.5V or 3.3V power supplies on HCSL/LVDS/LVPECL outputs
Embedded Low Drop Out (LDO) Voltage regulator provides superior Power Supply Noise Rejection
Maximum output to output skew of 50ps
Device controlled via I2C or hardware control pins
Factory configurable default settings via OTP
Transparent for spread spectrum clock
Applications
PCIe Gen1/2/3/4/5 clock distribution
Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC
General purpose clock distribution
Low jitter clock trees
Logic translation
Clock and data signal restoration
Wireless communications
High performance microprocessor clock distribution
Test Equipment

簡介

ZL40272屬于集成電路（IC）的時(shí)鐘緩沖器驅(qū)動(dòng)器。由制造生產(chǎn)的ZL40272時(shí)鐘緩沖器，驅(qū)動(dòng)器時(shí)鐘緩沖器和驅(qū)動(dòng)器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號(hào)在系統(tǒng)中傳輸，常用作頻率/時(shí)間參考信號(hào)，以同步系統(tǒng)內(nèi)的活動(dòng)。盡管這些器件最常用到的功能就是緩沖（即，為使信號(hào)不受驅(qū)動(dòng)負(fù)載的影響而從某個(gè)信號(hào)源復(fù)制信號(hào)），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號(hào)路徑、按某個(gè)整數(shù)值分割信號(hào)頻率，或進(jìn)行所用電信號(hào)格式轉(zhuǎn)換。