描述 Description

The ZL40209 is an LVPECL clock fan out buffer with two input and six output clock drivers capable of operating at frequencies up to 750MHz.The ZL40209 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40209 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.The ZL40209 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

特性 Features

Ultra low additive jitter of 106 fs RMS
Accepts two differential or single-ended inputs: LVPECL, LVDS, CML, HCSL, LVCMOS
Glitch-free switching of references
On-chip input termination resistors and biasing for AC coupled inputs
Six precision LVPECL outputs. Operating frequency up to 750 MHz.
Options for 2.5 V or 3.3 V power supply with core current consumption of 110 mA
On-chip Low Drop Out (LDO) Regulator for superior power supply rejection

簡介

ZL40209屬于集成電路（IC）的時(shí)鐘緩沖器驅(qū)動器。由制造生產(chǎn)的ZL40209時(shí)鐘緩沖器，驅(qū)動器時(shí)鐘緩沖器和驅(qū)動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時(shí)間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅(qū)動負(fù)載的影響而從某個(gè)信號源復(fù)制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個(gè)整數(shù)值分割信號頻率，或進(jìn)行所用電信號格式轉(zhuǎn)換。