描述 Description

CREATE AND SAMPLE YOUR CUSTOM ZL30169 HEREThe ZL30169 is a high performance OTN clock translator that provides output clocks with jitter performance of 250fs RMS. The device integrates a digital phase locked loop (DPLL), analog PLL and EEPROM into a tiny 5x5mm 32 pin QFN package. With programmable loop bandwidth from 14Hz to 500 Hz the DPLL provides hitless reference switching, holdover and jitter filtering. The integrated APLL generates the ultra-low jitter output clocks programmable to any frequency from <1Hz to 1035MHz. The integrated EEPROM provides automatic self-configuration of the device at start-up.

特性 Features

Input ClocksThree inputs, two differential/CMOS, one CMOS
Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
Inputs continually monitored for activity and frequency accuracy
Automatic or manual reference switching

簡(jiǎn)介

ZL30169屬于集成電路（IC）的應(yīng)用特定時(shí)鐘/定時(shí)。由制造生產(chǎn)的ZL30169應(yīng)用特定時(shí)鐘/定時(shí)專用時(shí)鐘和計(jì)時(shí) IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計(jì)環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂(lè)總線等。