最新无码a∨在线观看,一本av高清一区二区三区,亚洲熟妇色l20p,宅男噜噜69av,中出あ人妻熟女中文字幕

U74HC4046A

PHASE LOCKED LOOP WITH VCO; ? Low Power Consumption \n? Operating Power Supply Voltage Range:?? \n? Digital Section 2.0 to 6.0 V \n? VCO Section 3.0 to 6.0 V \n? Up to 17 MHz (typ.) Centre Frequency at VCC = 4.5 V \n? Excellent VCO Frequency Linearity \n? VCO-Inhibit Control For ON/OFF Keying and for Low Standby Power Consumption \n? Minimal Frequency Drift \n? Three Phase Comparators:???? \n? EXCLUSIVE-OR; \n? Edge-Triggered JK Flip-Flop; \n? Edge-Triggered RS Flip-Flop \n? Zero Voltage Offset due to OP-Amp Buffering \n? Standard Output Capability \n? MSI ICC Category;

The U74HC4046?is a phase-locked-loop circuit including a linear voltage-controlled oscillator (VCO), three different phase comparators (PC1, PC2 and PC3), a common signal input amplifier and a common comparator input. The signal can be directly coupled to large voltage signals or with a series capacitor coupled to small voltage signals. Small voltage signals can be kept within the linear region of the input amplifiers with a self-bias input circuit. The?U74HC4046?and a passive low-pass filter form a second-order loop PLL. With a linear op-amp, the VCO achieves excellent linearity. The VCO requires an external capacitor and resistor. R1 (between R1 and GND) and capacitor C1 (between C1A and C1B) determine the frequency range of the VCO. R2 (between R2 and GND) enables the VCO to have a frequency offset if required.For the high input impedance of the VCO, the design of low-pass filters is simplified, and the designer has a wide choice of resistor/capacitor ranges. At pin 10 (DEMOUT), a demodulator output of?the VCO input voltage is provided in order not to load the low-pass?filter. In conventional techniques, the DEMOUT voltage is one threshold voltage lower than the VCO input voltage, but the DEMOUT voltage of U74HC4046 equals the VCO input voltage. When DEMOUT is used, a load resistor (RS) should be connected from DEMOUT to GND; but if unused, DEMOUT should be left open. The VCO output (VCOOUT) can be connected directly or via a frequency-divider to the comparator input (COMPIN). If the VCO input is held at a constant DC level, the VCO output signal has a duty factor of 50% (maximum expected deviation 1%). A LOW level at the inhibit input (INH) enables the VCO and demodulator, while a HIGH level turns both off to minimize standby power consumption.

U74HC4046A

PHASE LOCKED LOOP WITH VCO

U74HC4046A

PHASE LOCKED LOOP WITH VCO

U74HC4046A_15

PHASE LOCKED LOOP WITH VCO

U74HC4046A_18

PHASE LOCKED LOOP WITH VCO

U74HC4046AG-P16-R

PHASE LOCKED LOOP WITH VCO

U74HC4046AG-P16-R

PHASE LOCKED LOOP WITH VCO

U74HC4046AG-P16-R

PHASE LOCKED LOOP WITH VCO

U74HC4046AG-S16-R

PHASE LOCKED LOOP WITH VCO

U74HC4046AG-S16-R

PHASE LOCKED LOOP WITH VCO