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3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2

文件：628.11 Kbytes 頁數(shù)：18 Pages

TI2

德州儀器

3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2

文件：629.16 Kbytes 頁數(shù)：18 Pages

TI2

德州儀器

3.3-V ABT 16-BIT REGISTERED TRANSCEIVER 3-STATE OUTPUTS

文件：304.79 Kbytes 頁數(shù)：12 Pages

TI1

德州儀器

Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs

General Description The LVT16543 and LVTH16543 16-bit transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting

文件：74.33 Kbytes 頁數(shù)：8 Pages

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs

General Description The LVT16543 and LVTH16543 16-bit transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting

文件：74.33 Kbytes 頁數(shù)：8 Pages

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs

General Description The LVT16543 and LVTH16543 16-bit transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting

文件：74.33 Kbytes 頁數(shù)：8 Pages

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司