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SN74ABT841ADWR集成電路(IC)的鎖存器規(guī)格書PDF中文資料
廠商型號(hào) |
SN74ABT841ADWR |
參數(shù)屬性 | SN74ABT841ADWR 封裝/外殼為24-SOIC(0.295",7.50mm 寬);包裝為管件;類別為集成電路(IC)的鎖存器;產(chǎn)品描述:IC 10BIT D-TYP LATCH 3ST 24-SOIC |
功能描述 | 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
封裝外殼 | 24-SOIC(0.295",7.50mm 寬) |
文件大小 |
497.69 Kbytes |
頁面數(shù)量 |
19 頁 |
生產(chǎn)廠商 | TI2 |
中文名稱 | 德州儀器 |
網(wǎng)址 | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-18 11:37:00 |
人工找貨 | SN74ABT841ADWR價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SN74ABT841ADWR規(guī)格書詳情
SN74ABT841ADWR屬于集成電路(IC)的鎖存器。由美國德州儀器公司制造生產(chǎn)的SN74ABT841ADWR鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲(chǔ)設(shè)備,但是不同之處在于,在鎖存使能(或類似命名)信號(hào)處于有效邏輯狀態(tài)的任何時(shí)間,保持的邏輯狀態(tài)都可以改變?!巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號(hào)有效時(shí)反映輸入的當(dāng)前狀態(tài),而相反的是,狀態(tài)僅在保持狀態(tài)已固定時(shí)改變。
State-of-the-Art EPIC-IIBE BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (NT)
and Ceramic (JT) DIPs
description
The SN54ABT841 and SN74ABT841A 10-bit
latches are designed specifically for driving highly
capacitive or relatively low-impedance loads.
They are particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The ten transparent D-type latches provide true
data at their outputs.
A buffered output-enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low logic levels) or a
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can
be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT841 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT841A is characterized for operation from –40°C to 85°C.
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
SN74ABT841ADWR
- 制造商:
Texas Instruments
- 類別:
集成電路(IC) > 鎖存器
- 系列:
74ABT
- 包裝:
管件
- 邏輯類型:
D 型透明鎖存器
- 電路:
10:10
- 輸出類型:
三態(tài)
- 電壓 - 供電:
4.5V ~ 5.5V
- 延遲時(shí)間 - 傳播:
4.1ns
- 電流 - 輸出高、低:
32mA,64mA
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
24-SOIC(0.295",7.50mm 寬)
- 供應(yīng)商器件封裝:
24-SOIC
- 描述:
IC 10BIT D-TYP LATCH 3ST 24-SOIC
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI(德州儀器) |
24+ |
SOP24300mil |
2317 |
只做原裝,提供一站式配單服務(wù),代工代料。BOM配單 |
詢價(jià) | ||
TI/德州儀器 |
24+ |
NA/ |
1790 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
TI/德州儀器 |
25+ |
原廠封裝 |
10280 |
詢價(jià) | |||
TI/德州儀器 |
24+ |
SOIC-24 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
TI |
21+ |
SOP |
1790 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
ADI |
23+ |
SOP |
8000 |
只做原裝現(xiàn)貨 |
詢價(jià) | ||
TI/德州儀器 |
23+ |
SOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
TI |
23+ |
SOIC-24 |
23960 |
代理渠道,價(jià)格優(yōu)勢(shì),有掛就有 |
詢價(jià) | ||
TI |
2025+ |
SOIC-24 |
16000 |
原裝優(yōu)勢(shì)絕對(duì)有貨 |
詢價(jià) | ||
TI |
2511 |
SOP |
3200 |
電子元器件采購降本 30%!盈慧通原廠直采,砍掉中間差價(jià) |
詢價(jià) |