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PA7572

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572

Programmable Electrically Erasable Logic Array;

The PA7572 is a member of the Programmable Electrically Erasable Logic (PEEL) Array family based on Anachips CMOS EEPROM technology. PEEL Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for todays programmable logic designs. The PA7572 offers a versatile logic array architecture with 24 I/O pins, 14 input pins and 60 registers/latches (24 buried logic cells, 12 input registers/latches, 24 buried I/Oregisters/latches). Its logic array implements 100 sum-of-products logic functions divided into two groups each serving 12 logic cells. Each group shares half (60) of the 120 product-terms available.

PA7572F-20

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572F-20L

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572FI-20

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572FI-20L

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572J-20

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572J-20L

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572JI-20

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog

PA7572JI-20L

Programmable Electrically Erasable Logic Array

GeneralDescription ThePA7572isamemberoftheProgrammableElectricallyErasableLogic(PEEL?)ArrayfamilybasedonAnachip’sCMOSEEPROMtechnology.PEEL?ArraysfreedesignersfromthelimitationsofordinaryPLDsbyprovidingthearchitecturalflexibilityandspeedneededfortoday’sprog