DESCRIPTION

The 18-Megabit Rambus? DRAM (RDRAM?) is an extremely high-speed CMOS DRAM organized as 2M words by 9 bits. It is capable of bursting up to 256 bytes of data at less than 2 nanoseconds per byte. The use of Rambus Signaling Logic (RSL) technology makes transfer rates greater than 500 MHz achievable while using conventional system and board design methodologies. Lower effective latency is attained by operating the dual 2KByte sense amplifiers as high speed caches, and by using random access mode to facilitate large block transfers.

FEATURES

? Rambus Interface:

Over 500 MB/sec peak transfer rate per RDRAM

Rambus Signaling Logic (RSL) interface

Synchronous protocol for fast block-oriented transfers

Direct connection to Rambus ASICs, MPUs, and Peripherals

15 active signals require just 32 total pins on the controller interface (including power)

3.3 V operation

Additional/multiple Rambus Channels provide an additional 500 MB/second band-width each

? Dual 2KByte sense amplifiers may be operated as caches for low latency access

? Random Access mode enables any burst order at full band width

? Features for graphics include random-access mode, write-per-bit and mask-per-bit operations

? Control and refresh logic entirely self-contained

? On-chip registers for flexible addressing and timing

? Available in horizontal surface mount plastic package (SHP32-P-1125-0.65-K)