描述 Description

The MC74VHC244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology. The MC74VHC244 is a noninverting 3-state buffer, and has two active-low output enables. This device is designed to be used with 3-state memory address drivers, etc.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems.

特性 Features

? High Speed: tPD = 3.9ns (Typ) at VCC = 5V
? Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C
? High Noise Immunity: VNIH = VNIL = 28% VCC
? Power Down Protection Provided on Inputs
? Balanced Propagation Delays
? Designed for 2V to 5.5V Operating Range
? Low Noise: VOLP = 0.9V (Max)
? Pin and Function Compatible with Other Standard Logic Families
? Latchup Performance Exceeds 300mA
? ESD Performance: HBM > 2000V; Machine Model > 200V
? Chip Complexity: 136 FETs
? Pb-Free Packages are Available

簡(jiǎn)介

MC74VHC244屬于集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由制造生產(chǎn)的MC74VHC244緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對(duì)某個(gè)電路的邏輯信號(hào)的訪問(wèn)，以用于另一電路。緩沖器將其輸入信號(hào)（不變或反相）傳遞到其輸出，并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。