描述 Description

The MAX108 PECL-compatible, 1.5Gsps, 8-bit ultra high-speed analog-to-digital converter (ADC) allows accurate digitizing of analog signals with bandwidths to 2.2GHz. Fabricated on Maxim's proprietary advanced GST-2 bipolar process, the MAX108 integrates a high-performance track/hold (T/H) amplifier and a quantizer on a single monolithic die.
The innovative design of the internal T/H, which has an exceptionally wide 2.2GHz full-power input bandwidth, results in high performance (typically 7.5 effective bits) at the Nyquist frequency. A fully differential comparator design and decoding circuitry reduce out-of-sequence code errors (thermometer bubbles or sparkle codes) and provide excellent metastable performance. Unlike other ultra high-speed ADCs that can have errors resulting in false full- or zero-scale outputs, the MAX108 limits the error magnitude to 1 LSB.
The analog input is designed for either differential or single-ended use with a ±250mV input voltage range. Dual, differential, positive-referenced emitter-coupled logic (PECL)-compatible output data paths ensure easy interfacing and include an 8:16 demultiplexer feature that reduces output data rates to one-half the sampling clock rate. The PECL outputs can be operated from any supply between +3V to +5V for compatibility with +3.3V or +5V referenced systems. Control inputs are provided for interleaving additional MAX108 devices to increase the effective system sampling rate.
The MAX108 is packaged in a 25mm x 25mm, 192-contact Enhanced Super Ball-Grid Array (ESBGA?) and is specified over the commercial (0°C to +70°C) temperature range. For pin-compatible, lower speed versions of the MAX108, see the MAX104 (1Gsps) and the MAX106 (600Msps) data sheets.

特性 Features

? 1.5Gsps Conversion Rate
? 2.2GHz Full-Power Analog Input Bandwidth
? 7.5 Effective Bits at fIN = 750MHz (Nyquist Frequency)
? ±0.25 LSB INL and DNL
? 50Ω Differential Analog Inputs
? ±250mV Input Signal Range
? On-Chip, +2.5V Precision Bandgap Voltage Reference
? Latched, Differential PECL Digital Outputs
? Selectable 8:16 Demultiplexer
? Internal Demux Reset Input with Reset Output
? 192-Contact ESBGA Package
? Pin Compatible with MAX104 (1Gsps) and MAX106 (600Msps)

應(yīng)用 Application

? 自動(dòng)測(cè)試設(shè)備(ATE)
? 數(shù)字示波器
? 數(shù)字射頻/中頻信號(hào)處理
? 直接射頻下變頻器
? 高能物理
? 高速數(shù)據(jù)采集器
? 雷達(dá)/ECM系統(tǒng)

簡(jiǎn)介

MAX108屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由制造生產(chǎn)的MAX108模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對(duì)模擬信號(hào)進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號(hào)。一般來(lái)說(shuō)，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類(lèi)型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。