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ICS9248-112中文資料ICST數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
ICS9248-112 |
功能描述 | Frequency Generator & Integrated Buffers for Celeron & PII/III? |
文件大小 |
384.6 Kbytes |
頁面數(shù)量 |
12 頁 |
生產(chǎn)廠商 | ICST |
網(wǎng)址 | |
數(shù)據(jù)手冊 | |
更新時間 | 2025-8-12 9:08:00 |
人工找貨 | ICS9248-112價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
ICS9248-112規(guī)格書詳情
General Description
The ICS9248-112 is the single chip clock solution for designs using the 810/810E style chipset. It provides all necessary clock singles for usch a system.
Output Features:
? 2- CPUs @2.5V, up to 150MHz.
? 9 - SDRAM @ 3.3V, up to150MHz including 1 free running
? 8 - PCICLK @ 3.3V
? 1 - IOAPIC @ 2.5V, PCI or PCI/2 MHz
? 2 - 3V66MHz @ 3.3V, 2X PCI MHz
? 1- 48MHz, @3.3V fixed.
? 1- 24MHz, @3.3V fixed
? 1- REF @3.3V, 14.318MHz.
Features:
? Up to 166MHz frequency support
? Support FS0-FS3 strapping status bit for I2C read back.
? Support power management: Through Power down Mode from I2C programming.
? Spread spectrum for EMI control ( ± 0.25 center).
? Spread can be enabled or disabled to all 32 frequencies throuth I2C.
? Uses external 14.318MHz crystal
Recommended Application:
810/810E type chipset.