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ICS9248-107規(guī)格書詳情
General Description
The ICS9248-107 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a zero delay buffer such as the ICS9179-06.
Output Features:
? 4 - CPUs @ 2.5V, up to 180MHz.
? 3 - IOAPIC @ 2.5V
? 3 - 3V66MHz @ 3.3V.
? 11 - PCIs @ 3.3V
? 1 - 48MHz, @ 3.3V fixed
? 1 - 24/48MHz, @ 3.3V
Features:
? Up to 180MHz frequency support
? Use a zero delay buffer such as the ICS9179-06 to generate SDRAM clocks.
? Support power management: Power down Mode from I2C programming.
? Spread spectrum for EMI control ± 0.25 center spread).
? Uses external 14.318MHz crystal
? 5 - FS pins for frequency select
Recommended Application:
RCC chipset