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HEF40175B

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175B

Quad D-type flip-flop

1.Generaldescription TheHEF40175BisaquadpositiveedgetriggeredD-typeflip-flopwithfourdata(Dn)inputs, commonclock(CP)andasynchronousmasterreset(MR)inputs,andcomplementaryQnandQn outputs.WhenMRisHIGHdataattheD-inputthatmeetstheset-upandholdtimerequireme

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

HEF40175B

Quadruple D-type flip-flop;

Features and benefits\nFully static operation\n5 V, 10 V, and 15 V parametric ratings\nStandardized symmetrical output characteristics\nOperates across the full industrial temperature range from ?40°C to +85°C\nComplies with JEDEC standard JESD 13-B

NXPNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

HEF40175BD

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175BF

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175BN

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175BP

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175BT

Quadruple D-type flip-flop

DESCRIPTION TheHEF40175Bisaquadrupleedge-triggeredD-typeflip-flopwithfourdatainputs(D0toD3),aclockinput(CP),anoverridingasynchronousmasterresetinput(MR),fourbufferedoutputs(O0toO3),andfourcomplementarybufferedoutputs(O0toO3).InformationonD0toD3istrans

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

HEF40175BT

Quad D-type flip-flop

1.Generaldescription TheHEF40175BisaquadpositiveedgetriggeredD-typeflip-flopwithfourdata(Dn)inputs, commonclock(CP)andasynchronousmasterreset(MR)inputs,andcomplementaryQnandQn outputs.WhenMRisHIGHdataattheD-inputthatmeetstheset-upandholdtimerequireme

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

HEF40175BT

Quad D-type flip-flop; ? Fully static operation\n? 5 V, 10 V, and 15 V parametric ratings\n? Standardized symmetrical output characteristics\n? Specified from –40 ℃ to +125 ℃\n? Complies with JEDEC standard JESD 13-B\n;

The HEF40175B is a quad edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP), an overriding asynchronous master reset input (MR), four buffered outputs (Q0 to Q3), and four complementary buffered outputs (Q0 to Q3). Information on D0 to D3 is transferred to Q0 to Q3 on the LOW-to-HIGH transition of CP if MR is HIGH. When LOW, MR resets all flip-flops (Q0 to Q3 = LOW; Q0 to Q3 = HIGH), independent of CP and D0 to D3.\n It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.\n

NexperiaNexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

技術(shù)參數(shù)

  • VCC (V)：

    3.0?-?15

  • Logic switching levels：

    CMOS

  • Output drive capability (mA)：

    ± 2.4

  • tpd (ns)：

    25

  • fmax (MHz)：

    45

  • Power dissipation considerations：

    low

  • Tamb (°C)：

    -40~85

  • Rth(j-a) (K/W)：

    81

  • Ψth(j-top) (K/W)：

    4.7

  • Rth(j-c) (K/W)：

    39.8

  • Package name：

    SO16

供應(yīng)商型號(hào)品牌批號(hào)封裝庫(kù)存備注價(jià)格
PHI
2016+
DIP16
6523
只做進(jìn)口原裝現(xiàn)貨!假一賠十!
 詢價(jià)
恩XP
2016+
DIP16
9000
只做原裝,假一罰十,公司可開(kāi)17%增值稅發(fā)票!
 詢價(jià)
PHI
24+
SOP
3200
絕對(duì)原裝自家現(xiàn)貨!真實(shí)庫(kù)存!歡迎來(lái)電!
 詢價(jià)
PHI
99+
SOP16
98
全新原裝進(jìn)口自己庫(kù)存優(yōu)勢(shì)
 詢價(jià)
恩XP
16+
NA
8800
原裝現(xiàn)貨,貨真價(jià)優(yōu)
 詢價(jià)
恩XP
23+
SOP16
8000
原裝正品,假一罰十
 詢價(jià)
PHI
24+
DIP16
5
詢價(jià)
PHI
17+
SOP16
9988
只做原裝進(jìn)口,自己庫(kù)存
 詢價(jià)
PHI
1994
SOP
516
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢
 詢價(jià)
PHI
23+
DIP-16
8650
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣(mài)!
 詢價(jià)
更多HEF40175B供應(yīng)商 更新時(shí)間2025-7-27 20:47:00

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