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SN74GTLPH306DGVR

Marking：GH306；Package：TVSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306DGVR.B

Marking：GH306；Package：TVSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306DGVRG4.B

Marking：GH306；Package：TVSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306PW

Marking：GH306；Package：TSSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306PW.B

Marking：GH306；Package：TSSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306PWR

Marking：GH306；Package：TSSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

SN74GTLPH306PWR.B

Marking：GH306；Package：TSSOP；8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

FEATURES ·TI-OPC?CircuitryLimitsRingingon UnevenlyLoadedBackplanes ·OEC?CircuitryImprovesSignalIntegrityand ReducesElectromagneticInterference ·BidirectionalInterfaceBetweenGTLPSignal LevelsandLVTTLLogicLevels ·LVTTLInterfacesAre5-VTolerant ·Medium-DriveGTLP

TI2Texas Instruments

德州儀器美國德州儀器公司

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