AD9129屬于開發(fā)板套件編程器的評估板-數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9129評估板 - 數(shù)模轉(zhuǎn)換器（DAC）該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的設(shè)計環(huán)境中對用于將數(shù)字數(shù)據(jù)轉(zhuǎn)換為模擬格式的器件進行性能或特性評估。重點器件涵蓋范圍從以適合學(xué)生或愛好者使用的方式實現(xiàn)的適度功能器件，到適合電信基礎(chǔ)設(shè)施應(yīng)用的高級器件。

GENERAL DESCRIPTION

The AD9119/AD9129 are high performance, 11-/14-bit RF digital to-analog converters (DACs) supporting data rates up to 2.8 GSPS. The DAC core is based on a quad-switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.6 GSPS when configured for Mix-Mode? or 2× interpolation. The high dynamic range and bandwidth enable multicarrier generation up to 4.2 GHz.

FEATURES

DAC update rate: up to 5.6 GSPS

Direct RF synthesis at 2.8 GSPS data rate

DC to 1.4 GHz in baseband mode

DC to 1.0 GHz in 2× interpolation mode

1.4 GHz to 4.2 GHz in Mix-Mode

Bypassable 2× interpolation

Excellent dynamic performance

Supports DOCSIS 3.0 wideband ACLR/harmonic performance

8 QAM carriers: ACLR > 65 dBc

Industry-leading single/multicarrier IF or RF synthesis

4-carrier W-CDMA ACLR at 2457.6 MSPS

fOUT = 900 MHz, ACLR = 71 dBc (baseband mode)

fOUT = 2100 MHz, ACLR = 68 dBc (Mix-Mode)

fOUT = 2700 MHz, ACLR = 67 dBc (Mix-Mode)

Dual-port LVDS and DHSTL data interface

Up to 1.4 GSPS operation

Source synchronous DDR clocking with parity bit

Low power: 1.0 W at 2.8 GSPS (1.3 W at 5.6 GSPS)

APPLICATIONS

Broadband communications systems

CMTS/VOD

Wireless infrastructure: W-CDMA, LTE, point-to-point

Instrumentation, automatic test equipment (ATE)

Radars, jammers