AD9122-M5372-EBZ屬于開發(fā)板套件編程器的評估板-數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導體技術(shù)有限公司制造生產(chǎn)的AD9122-M5372-EBZ評估板 - 數(shù)模轉(zhuǎn)換器（DAC）該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的設(shè)計環(huán)境中對用于將數(shù)字數(shù)據(jù)轉(zhuǎn)換為模擬格式的器件進行性能或特性評估。重點器件涵蓋范圍從以適合學生或愛好者使用的方式實現(xiàn)的適度功能器件，到適合電信基礎(chǔ)設(shè)施應(yīng)用的高級器件。

GENERAL DESCRIPTION

The AD9122 is a dual 16-bit, high dynamic range, digital-to analog converter (DAC) that provides a sample rate of 1200 MSPS, permitting a multicarrier generation up to the Nyquist frequency. It includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 4-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9122 comes in a 72-lead LFCSP.

FEATURES

Flexible LVDS interface allows word, byte, or nibble load

Single-carrier W-CDMA ACLR = 82 dBc @ 122.88 MHz IF

Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω

Novel 2×/4×/8× interpolator/complex modulator allows carrier placement anywhere in the DAC bandwidth

Digital gain and phase adjustment for sideband suppression

Multiple chip synchronization interfaces

High performance, low noise PLL clock multiplier

Digital inverse sinc filter

Flexible LVDS interface allows word, byte, or nibble load

Low power: 1.5 W @ 1.2 GSPS, 800 mW @ 500 MSPS, full operating conditions

72-lead, exposed paddle LFCSP