特性 Features

·SONET/SDH applications up to OC-3/STM-1 bit rates
·Switches between grouped inputs (SEC/Sync pairs)
·Inputs: three SECs at any of 2, 4, 8 kHz (and N x 8 kHz multiples up to 155.52 MHz), plus Frame Sync/Multi-Frame Sync
·Outputs: two SEC clocks at any of several spot frequencies from 2 kHz up to 77.76 MHz via the TTL/CMOS port and up to 311.04 MHz via the PECL/LVDS port
·Selectable clock I/O port technologies
·Modes for E3/DS3 and multiple E1/DS1 rate output clocks
·Generates 8 kHz Frame Sync and 2 kHz Multi-Frame Sync output clocks with programmable pulse width and polarity
·Frequency translation of SEC input clock to a different local line card clock
·Robust input clock source activity monitoring on all inputs
·Supports Free-run, Locked and Digital Holdover modes of operation
·Automatic “Hit-less” source switchover on loss of input
·External force fast switch between SEC1/SEC2 inputs
·Phase Build-out for output clock phase continuity during input switchover
·PLL “Locked” and “Acquisition” bandwidths individually selectable from 18, 35 or 70 Hz
·Serial interface for device set-up
·Single 3.3 V operation, 5 V I/O compatible
·Operating temperature (ambient) of -40 to +85°C
·Available in LQFP 64 package
·Lead (Pb)-free version available (ACS8525T), RoHS and WEEE compliant

簡(jiǎn)介

ACS8525屬于集成電路（IC）的應(yīng)用特定時(shí)鐘/定時(shí)。由制造生產(chǎn)的ACS8525應(yīng)用特定時(shí)鐘/定時(shí)專用時(shí)鐘和計(jì)時(shí) IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計(jì)環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂總線等。