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首頁>74V2G03>規(guī)格書詳情

74V2G03中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

74V2G03
廠商型號

74V2G03

功能描述

DUAL 2-INPUT OPEN DRAIN NAND GATE

文件大小

132.06 Kbytes

頁面數(shù)量

7

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識
STMICROELECTRONICS
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-8-2 23:00:00

人工找貨

74V2G03價格和庫存,歡迎聯(lián)系客服免費人工找貨

74V2G03規(guī)格書詳情

DESCRIPTION

The 74V2G03 is an advanced high-speed CMOS DUAL 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

The device can, with an external pull-up resistor, be used in wired AND configuration. This device can also be used as a led driver in any other application requiring current sink.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 3.9ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1μA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUTS

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ IMPROVED LATCH-UP IMMUNITY

產(chǎn)品屬性

  • 型號:

    74V2G03

  • 功能描述:

    DUAL 2-INPUT OPEN DRAIN NAND GATE

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
ST/意法
24+
NA/
447
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票
詢價
ST/意法
22+
SOT23-8
100000
代理渠道/只做原裝/可含稅
詢價
ST
23+
SOT23
9526
詢價
ST
2511
SOT23-8
16900
電子元器件采購降本 30%!盈慧通原廠直采,砍掉中間差價
詢價
ST
24+
SOT23-8
2987
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電!
詢價
ST
23+
SOT23-8
16900
正規(guī)渠道,只有原裝!
詢價
STMicroelectronics
18+
ICINVERTERTRIPLESOT23-8
6580
公司原裝現(xiàn)貨
詢價
STMicroelect
2023+
SOT-23-8
50000
原裝現(xiàn)貨
詢價
ST/意法
22+
N
28000
原裝現(xiàn)貨只有原裝.假一罰十
詢價
ST/意法
23+
SOT23-8
15338
原廠授權(quán)代理,海外優(yōu)勢訂貨渠道。可提供大量庫存,詳
詢價