描述 Description

The ZL80032 is a feature-rich network synchronization solution with two independent DPLL clock channels plus three additional DPLLs for NCO Hybrid, Split XO and redundant oscillator modes, and five extremely low output jitter synthesizers. This solution is ideal for Synchronous Ethernet (SyncE) central timing applications such as 5G Distributed Units (DU), Centralized Units (CU) and Radio Units (CU).

The ZL80732 is another device in this family which is targeted for 5G SyncE and IEEE1588/PTP timing applications.

特性 Features

HighlightsUltra Precise Timing for 5G
Two independent DPLL clock channels plus three additional DPLLs for NCO Hybrid, Split XO and redundant Five output synthesizers
Any-to-any frequency conversion per channel
Inputs: up to 10, differential or single-ended
Outputs: up to 10 differential, up to 20 CMOS
Output jitter 100 fs RMS typical for 156.25 MHz 12 kHz to 20 MHz
Core power consumption Reset-to-clocks Physical-layer frequency synchronization
Processor reset output signal on OUT6N
Interrupt output signal on OUT6P
Physical-layer compliance with ITU-T G.8262, G.8262.1, G.813, G.812, Telcordia GR-1244, GR-253
Hitless reference switching
General FeaturesAutomatic self-configuration at power-up from internal Flash memory, 7 configurations
Input-to-output alignment Numerically controlled oscillator behavior in each DPLL and each synthesizer
Easy-to-configure design requires no external VCXO or loop filter components
5 GPIO pins with many possible behaviors, each REF can be GPI, each OUT can be GPO
SPI or I2C processor Interface
1.8V and 3.3V core VDD voltages
Easy-to-use evaluation/programming software

簡(jiǎn)介

ZL80032屬于集成電路（IC）的應(yīng)用特定時(shí)鐘/定時(shí)。由制造生產(chǎn)的ZL80032應(yīng)用特定時(shí)鐘/定時(shí)專(zhuān)用時(shí)鐘和計(jì)時(shí) IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計(jì)環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤(pán)播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車(chē)載娛樂(lè)總線等。