GENERAL DESCRIPTION

The XRT83L30 is a fully integrated single-channel long-haul and short-haul line interface unit for T1(1.544Mbps) 100?, E1(2.048Mbps) 75? or 120? and J1 110? applications.

FEATURES

? Fully integrated single-channel long-haul and short-haul transceiver for E1,T1 or J1 applications.

? Adaptive Receive Equalizer for cable attenuation of up to 45dB for T1 and 43dB for E1.

? Programmable Transmit Pulse Shaper for E1,T1 or J1 short-haul interfaces.

? Five fixed transmit pulse settings for T1 short-haul applications plus a fully programmable waveform generator for transmit output pulse shaping.

? Programmable Transmit Line Build-Outs (LBO) for T1 long-haul application from 0dB to -22.5dB in three 7.5dB steps.

? Tri-State transmit output and receive input capability for redundancy applications

? Selectable receiver sensitivity from 0 to 36dB or 0 to 45dB cable loss for T1 @772kHz and 0 to 43dB for E1 @1024kHz.

? High receiver interference immunity

? Receive monitor mode handles 0 to 29dB resistive attenuation along with 0 to 6dB of cable attenuation for both T1 and E1 modes.

? Supports 75? and 120? (E1), 100? (T1) and 110? (J1) applications.

? Internal and external impedance matching for 75?,100?, 110? and 120?.

? Transmit return loss meets or exceeds ETSI 300 166 standard

? On-chip digital clock recovery circuit for high input jitter tolerance

? Crystal-less digital jitter attenuator with 32-bit or 64-bit FIFO Selectable either in transmit or receive path

? On-chip frequency multiplier generates T1 or E1 Master clocks from variety of external clock sources

? On-chip transmit short-circuit protection and limiting, and driver fail monitor output (DMO)

? Receive loss of signal (RLOS) output

? On-chip HDB3/B8ZS/AMI encoder/decoder

? QRSS pattern generation and detection for testing and monitoring

? Error and Bipolar Violation Insertion and Detection

? Receiver Line Attenuation Indication Output in 1dB steps

? Network Loop-Code Detection for automatic Loop-Back Activation/Deactivation

? Transmit All Ones (TAOS) and In-Band Network Loop Up and Down code generators

? Supports Analog, Remote, Digital and Dual Loop-Back Modes

? Meets or exceeds T1 and E1 short-haul and long-haul network access specifications in ITU G.703, G.775, G.736 and G.823; TR-TSY-000499; ANSI T1.403 and T1.408; ETSI 300-166 and AT&T Pub 62411

? Supports both Hardware and serial Microprocessor interface for programming

? Programmable Interrupt

? Low power dissipation

? Logic inputs accept either 3.3V or 5V levels

? Single +3.3V Supply Operation

? 64 pin TQFP package

? -40°C to +85°C Temperature Range

APPLICATIONS

? T1 Digital Cross-Connects (DSX-1)

? ISDN Primary Rate Interface

? CSU/DSU E1/T1/J1 Interface

? T1/E1/J1 LAN/WAN Routers

? Public switching Systems and PBX Interfaces

? T1/E1/J1 Multiplexer and Channel Banks