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XCF16PVO48C

Platform Flash In-System Programmable Configuration PROMs; ? In-System Programmable PROMs for Configuration of Xilinx? FPGAs\r\n? Low-Power Advanced CMOS NOR Flash Process\r\n? Endurance of 20,000 Program/Erase Cycles\r\n? Operation over Full Industrial Temperature Range(–40°C to +85°C)\r\n? IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing\r\n? JTAG Command Initiation of Standard FPGA Configuration\r\n? Cascadable for Storing Longer or Multiple Bitstreams\r\n? Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ)\r\n? I/O Pins Compatible with Voltage Levels Ranging From 1.8V to 3.3V\r\n? Design Support Using the Xilinx ISE? Alliance and Foundation? Software Packages\r\n? XCF01S/XCF02S/XCF04S\r\n? 3.3V Supply Voltage\r\n? Serial FPGA Configuration Interface\r\n? Available in Small-Footprint VO20 and VOG20 Packages\r\n? XCF08P/XCF16P/XCF32P\r\n? 1.8V Supply Voltage\r\n? Serial or Parallel FPGA Configuration Interface\r\n? Available in Small-Footprint VO48, VOG48, FS48, and FSG48 Packages\r\n? Design Revision Technology Enables Storing and Accessing Multiple Design Revisions for Configuration\r\n? Built-In Data Decompressor Compatible with Xilinx Advanced Compression Technology;