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WC32P040-XP4M中文資料WEDC數據手冊PDF規(guī)格書

廠商型號 |
WC32P040-XP4M |
功能描述 | 32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface |
文件大小 |
726.71 Kbytes |
頁面數量 |
23 頁 |
生產廠商 | White Electronic Designs Corporation |
企業(yè)簡稱 |
WEDC |
中文名稱 | White Electronic Designs Corporation |
原廠標識 | ![]() |
數據手冊 | |
更新時間 | 2025-7-15 18:27:00 |
人工找貨 | WC32P040-XP4M價格和庫存,歡迎聯(lián)系客服免費人工找貨 |
WC32P040-XP4M規(guī)格書詳情
DESCRIPTION
The WC32P040 is a 68000-compatible, high-performance, 32-bit microprocessor. The WC32P040 is a virtual memory microprocessor employing multiple concurrent execution units and a highly intergrated architecture that provides very high performance in a monolithic HCMOS device. It has a 68030-compatible integer unit (IU) and two independent caches. The WC32P040 contains dual, independent, demand-paged memory management units (MMUs) for instruction and data stream accesses and independent, 4-Kbyte instruction and data caches. The WC32P040 has a 68881/68882-compatible fl oating-point unit (FPU).
68040 FEATURES
■ Selection of Processor Speeds: 25, 33MHz
■ Military Temperature Range: -55°C to +125°C
■ Packaging
? 179 pin Ceramic PGA (P4)
? 184 lead Ceramic Quad Flatpack, CQFP (Q4)
■ 6-Stage Pipeline, 68030-Compatible IU
■ 68881/68882-Compatible FPU
■ Independent Instruction and Data MMUs
■ Simultaneously Accessible, 4-Kbyte Physical Instruction Cache and 4-Kbyte Physical Data Cache
■ Low-Latency Bus Acceses for Reduced Cache Miss Penalty
■ Multimaster/Multiprocessor Support via Bus Snooping
■ Concurrent IU, FPU, MMU, and Bus Controller Operation Maximizes Throughput
■ 32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
■ User Object-Code Compatible with all Earlier 68000 Microprocessors
■ 4-GigaByte Direct Addressing Rang
產品屬性
- 型號:
WC32P040-XP4M
- 制造商:
WEDC
- 制造商全稱:
White Electronic Designs Corporation
- 功能描述:
32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
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