GENERAL DESCRIPTION

The W742C814 is a high-performance 4-bit micro-controller (μC) that provides an LCD driver. The device contains a 4-bit ALU, two 8-bit timers, two dividers (for two oscillators) in dual-clock operation, a 32 × 4 LCD driver, five 4-bit I/O ports (including 1 output port for LED driving), and one channel DTMF generator. There are also five interrupt sources and 8-levels subroutine nesting for call subroutine or interrupt applications. The W742C814 operates on very low current and has two power reduction modes, that is the dual-clock slow operation and STOP mode, which help to minimize power dissipation.

FEATURES

? Operating voltage: 2.4V - 5.5V

? Dual-clock operation mode (Connect to 32768 Hz crystal only)

Fslow oscillator: 32768 Hz OSC

Ffast oscillator: PLL (Phase Lock Loop) output enable

? Memory

? 4096 x 16 bits program ROM (including 16K x 4 bit look-up table)

? 1024 x 4 bits data RAM (including 16 nibbles x 16 pages working registers)

? 32 x 4 LCD data RAM

? 20 input/output pins

? Port for input only: 1 ports/4 pins (RC)

? Input/output ports: 3 ports/12 pins (RA, RB & RD)

? High sink current output port for LED driving: 1 port /4 pins (RE)

? Power-down mode

? Hold function: no operation (excluding Fslow and Fosc oscillator)

? Stop function: no operation (Fslow and Fosc oscillator are stopped)

? Dual-clock slow operation mode: system is operated by 32768 Hz (FOSC = Fslow and Ffast stopped)

? Five types of interrupts

? Four internal interrupts (Divider0, Divider1, Timer 0, Timer 1)

? One external interrupts (RC Port)

? LCD driver output

? 32 segments x 4 commons

? 1/4 duty 1/3 bias driving mode

? MFP output pin

? Output is software selectable as modulating or non-modulating frequency

? Works as frequency output specified by Timer 1

? DTMF output pin (PLL should be enable in this function)

? Output is one channel Dual Tone Multi-Frequency signal for dialing

? Two built-in 14-bit frequency dividers

? Divider0: the clock source is the output of the Fosc-oscillator

? Divider1: the clock source is the output of the Fslow-oscillator

? Two built-in 8-bit programmable countdown timers

? Timer 0: one of two internal clock frequencies (FOSC/4 or FOSC/1024) can be selected

? Timer 1: with auto-reload function and one of three internal clock frequencies (FOSC, FOSC/64 or Fs) can be selected by MR1 register; and the specified frequency can be delivered to MFP pin

? Built-in 18/15-bit watchdog timer selectable for system reset; enable the watch dog timer or not is determined by code option

? Build-in Power-on reset detested circuit

? Powerful instruction set: 1XX instructions

? 8-levels subroutine (include interrupt) nesting