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首頁(yè)>TWL6041BYFFT>規(guī)格書(shū)詳情

TWL6041BYFFT集成電路(IC)的編解碼器規(guī)格書(shū)PDF中文資料

TWL6041BYFFT
廠商型號(hào)

TWL6041BYFFT

參數(shù)屬性

TWL6041BYFFT 封裝/外殼為81-UFBGA,DSBGA;包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類(lèi)別為集成電路(IC)的編解碼器;產(chǎn)品描述:IC AUDIO CODEC 8CH LP 81DSBGA

功能描述

TWL6041 8-Channel Low-Power Audio Codec for Portable Applications
IC AUDIO CODEC 8CH LP 81DSBGA

絲印標(biāo)識(shí)

TWL6041B

封裝外殼

DSBGA / 81-UFBGA,DSBGA

文件大小

235.59 Kbytes

頁(yè)面數(shù)量

11 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱(chēng)

TI2德州儀器

中文名稱(chēng)

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

原廠下載下載地址一下載地址二到原廠下載

更新時(shí)間

2025-7-15 16:12:00

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TWL6041BYFFT規(guī)格書(shū)詳情

TWL6041BYFFT屬于集成電路(IC)的編解碼器。由美國(guó)德州儀器公司制造生產(chǎn)的TWL6041BYFFT編解碼器編解碼器是用于通過(guò)壓縮和解壓縮來(lái)轉(zhuǎn)換數(shù)據(jù)的半導(dǎo)體器件。數(shù)據(jù)壓縮可提高傳輸速度并減少存儲(chǔ)空間。某些編解碼器提供高達(dá) 32 位的分辨率,并且分別提供多達(dá) 6 個(gè)或 8 個(gè)模數(shù)轉(zhuǎn)換器和數(shù)模轉(zhuǎn)換器。除三角積分調(diào)制外,還有 I2C、I2S、SPI、串行、HDA、S/DIF、PCM、USB、AC'97 和 SLIMbus 數(shù)據(jù)接口。

1.1 Features 1

? Four Audio Digital-to-Analog Converter (DAC)

Channels

? Stereo Capless Headphone Drivers

– Up to 104-dB DR

– Power Tune for Performance and Power

Consumption Tradeoff

? Stereo 8 Ω, 1.5 W per Channel Speaker Drivers

also with 4-Ω Support Capability

? Differential Earpiece Driver

? Stereo Line-Out

? Two Audio Analog-to-Digital Converter (ADC)

Channels

– 96-dBA SNR

? Four Audio Inputs:

– Three Differential Microphone Inputs

– Stereo Line-In and FM Input

? Two Vibrator and Haptics Feedback Channels

– Differential H-bridge Drivers

? Two Low-Noise Analog Microphone Bias Outputs

? Two Digital Microphone Bias Outputs

? Analog Low-Power Loop from Line-in to

Headphone and Speaker Outputs

? Dual Phase-Locked Loops (PLLs) for Flexible

Clock Support:

– 32-kHz Sleep Clock Input for System Low-

Power Playback Mode

– 12-, 19.2-, 26-, and 38.4-MHz System Clock

Input

? Accessory Plug and Unplug Detection, Accessory

Button Press Detection

? Integrated Power Supplies:

– Negative Charge Pump for Capless Headphone

Driver

– Two Low Dropout Voltage Regulators (LDOs)

for High Power Supply Rejection Ration (PSRR)

? I2C Control

? Thermal Protection:

– Host Interrupt

? Power Supplies:

– Analog: 2.1 V

– Digital I/O: 1.8 V

– Battery: 2.3 V–5.5 V

? Package 3.8-mm × 3.8-mm 81-Pin WCSP

1.2 Applications

? Mobile and Smart Phones

? MP3 Players

? Handheld Devices

1.3 Description

The TWL6041 is an audio codec with a high level of integration providing analog audio codec functions for

portable applications, as shown in Figure 1-1. The device contains multiple audio analog inputs and

outputs, as well as microphone biases and accessory detection. The device is connected to the OMAP?

4 host processor through a proprietary PDM interface for audio data communication enabling partitioning

with optimized power consumption and performance. Multichannel audio data is multiplexed to a single

wire for downlink (PDML) and uplink (PDMUL).

The OMAP4 device provides the TWL6041 device with five PDM audio-input channels (DL0–DL4).

Channels DL0–DL3 are connected to four parallel DAC channels multiplexed to stereo headphone (HSL,

HSR), stereo speaker (HFL, HFR), and earpiece (EAR) or stereo line outputs (AUXL, AUXR).

The stereo headphone path has a low-power (LP) mode operating from a 32-kHz sleep clock to enable

more than 100 hours of MP3 playback time. Very-high dynamic range of 104 dBA is achieved when using

the system clock input and DAC path high-performance (HP) mode. Class-AB headphone drivers provide

a 1-Vrms output and are ground centered for capless connection to a headphone, thus enabling system

size and cost reduction. The earpiece driver is a differential class-AB driver with 2-Vrms capability to a

typical 32-Ω load or 1.4-Vrms to a typical 16-Ω load.

Stereo speaker path has filterless class-D outputs with 1.5-W capability per channel. Additionally, the 4-Ω

load is supported. For output-power maximization, supply connection to an external boost is supported.

Speaker drivers also support hearing aid coil loads.

For vibrator and haptic feedback support, the TWL6041 device has two PWM channels with independent

input signals from DL4 or I2C. Vibra drivers are differential H-bridge outputs, enabling fast acceleration

and deceleration of vibra motor. An external driver for a hearing aid coil or a piezo speaker requiring high

voltage can be connected to line outputs.

The TWL6041 supports three differential microphone inputs (MMIC, HMIC, and SMIC) and a stereo lineinput

(AFML, AFMR) multiplexed to two parallel ADCs. The PDM output from the ADCs is transmitted to

the OMAP4 processor through UL0 and UL1. AFML, AFMR inputs can also be looped to analog outputs

(LB0, LB1).

Two LDOs provide a voltage of 2.1 V to bias analog microphones (MBIAS and HBIAS). The maximum

output current is 2 mA for each analog bias, allowing up to two microphones on one bias. Two LDOs

provide a voltage of 1.8 V to 1.85 V to bias digital microphones (DBIAS1 and DBIAS2). One bias

generator can bias several digital microphones at the same time, with a total maximum output current of

10 mA.

The TWL6041 device has an integrated negative charge pump and two LDOs (HS LDO and LS LDO) for

high PSRR. The only external supply needed is 2.1 V, which is available from the 2.1-V DC-DC of

TWL6030/6032 power-management IC (PMIC) in the OMAP4 system. By powering audio from low-noise

2.1-V DC-DC of low power consumption, high dynamic range and high output swing at the headset output

are achieved. All other supply inputs can be directly connected to battery or system 1.8-V I/O.

Two integrated PLLs enable operation from a 12-, 19.2-, 26-, and 38.4-MHz system clock (MCLK) or, in

LP playback mode, from a 32-kHz sleep clock (CLK32K). The frequency plan is based on a 48-kS/s audio

data rate for all channels, and the host processor uses sample-rate converters to interface with different

sample rates (for example, 44.1 kHz). In the specific case of low-power audio playback, the TWL6041

supports the 44.1-kS/s and 48-kS/s rates. Transitions between sample rates or input clocks are seamless.

Accessory plug and unplug detections are supported (PLUGDET). Some headsets have a manual switch

for submitting send/end signal to the terminal through the microphone input pin. This feature is supported

by a periodic accessory button press detection to minimize current consumption in sleep mode. Detection

cycle properties can be programmed according to system requirements.

The TWL6041BSRS, when connected to OMAP4 and OMAP5 platform, includes SRS Audio Effects, SRS

pre-processing solutions and SRS TruMedia as standard feature for Android? ICS.

產(chǎn)品屬性

更多
  • 產(chǎn)品編號(hào):

    TWL6041BYFFT

  • 制造商:

    Texas Instruments

  • 類(lèi)別:

    集成電路(IC) > 編解碼器

  • 包裝:

    卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶

  • 類(lèi)型:

    音頻

  • 數(shù)據(jù)接口:

    I2C

  • ADC/DAC 數(shù):

    2 / 4

  • 三角積分:

    無(wú)

  • 電壓 - 供電,模擬:

    2.1V

  • 電壓 - 供電,數(shù)字:

    1.8V

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類(lèi)型:

    表面貼裝型

  • 封裝/外殼:

    81-UFBGA,DSBGA

  • 供應(yīng)商器件封裝:

    81-DSBGA(3.8x3.8)

  • 描述:

    IC AUDIO CODEC 8CH LP 81DSBGA

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
TI(德州儀器)
24+
DSBGA-81(3
7969
支持大陸交貨,美金交易。原裝現(xiàn)貨庫(kù)存。
詢價(jià)
TI/德州儀器
22+
WCSP
20000
原裝現(xiàn)貨,實(shí)單支持
詢價(jià)
TI
2025+
DSBGA-81
16000
原裝優(yōu)勢(shì)絕對(duì)有貨
詢價(jià)
TI/德州儀器
24+
DSBGA81
21574
鄭重承諾只做原裝進(jìn)口現(xiàn)貨
詢價(jià)
TI/德州儀器
23+
81-DSBGA
3921
原裝正品代理渠道價(jià)格優(yōu)勢(shì)
詢價(jià)
Texas Instruments
23+/24+
81-UFBGA
8600
只供原裝進(jìn)口公司現(xiàn)貨+可訂貨
詢價(jià)
TI/德州儀器
24+
NA/
3910
原廠直銷(xiāo),現(xiàn)貨供應(yīng),賬期支持!
詢價(jià)
TI
24+
WCSP
65200
一級(jí)代理/放心采購(gòu)
詢價(jià)
TI
25+
DSBGA (YFF)
6000
原廠原裝,價(jià)格優(yōu)勢(shì)
詢價(jià)
TI
22+
81-DSBGA
5000
全新原裝,力挺實(shí)單
詢價(jià)