TLV5604CDR屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由美國德州儀器公司制造生產(chǎn)的TLV5604CDR數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號轉(zhuǎn)換為緩沖或無緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂播放器，將數(shù)字數(shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號，再連接到屏幕驅(qū)動器，以顯示單色或彩色圖像。

Four 10-Bit D/A Converters

Programmable Settling Time

of 3 μs or 9 μs Typ

TMS320, (Q)SPI?, and Microwire?

Compatible Serial Interface

Internal Power-On Reset

Low Power Consumption:

5.5 mW, Slow Mode – 5-V Supply

3.3 mW, Slow Mode – 3-V Supply

Reference Input Buffers

Voltage Output Range . . . 2× the Reference

Input Voltage

Monotonic Over Temperature

Dual 2.7-V to 5.5-V Supply (Separate Digital

and Analog Supplies)

Hardware Power Down (10 nA)

Software Power Down (10 nA)

Simultaneous Update

applications

Battery Powered Test Instruments

Digital Offset and Gain Adjustment

Industrial Process Controls

Machine and Motion Control Devices

Communications

Arbitrary Waveform Generation

description

The TLV5604 is a quadruple 10-bit voltage output

digital-to-analog converter (DAC) with a flexible

4-wire serial interface. The 4-wire serial interface

allows glueless interface to TMS320, SPI, QSPI,

and Microwire serial ports. The TLV5604 is

programmed with a 16-bit serial word comprised

of a DAC address, individual DAC control bits, and

a 10-bit DAC value.

The device has provision for two supplies: one digital supply for the serial interface (via pins DVDD and DGND),

and one for the DACs, reference buffers and output buffers (via pins AVDD and AGND). Each supply is

independent of the other, and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical

application where the DAC will be controlled via a microprocessor operating on a 3-V supply (also used on pins

DVDD and DGND), with the DACs operating on a 5-V supply. Of course, the digital and analog supplies can be

tied together.

The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB

output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode

makes it ideal for single voltage, battery based applications. The settling time of the DAC is programmable to

allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits

within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD

terminals to reduce the need for a low source impedance drive to the terminal. REFINAB and REFINCD allow

DACs A and B to have a different reference voltage then DACs C and D.

The device, implemented with a CMOS process, is available in 16-terminal SOIC and TSSOP packages. The

TLV5604C is characterized for operation from 0°C to 70°C. The TLV5604I is characterized for operation from

–40°C to 85°C.