描述 Description

The TLV320AIC31 is a low-power stereo audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz digital-to-analog converter (DAC) playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.
The record path of the TLV320AIC31 contains integrated microphone bias, a digitally-controlled stereo microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs.The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls to the various outputs.
The TLV320AIC31 contains four high-power output drivers as well as two fully differential output drivers.The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended, 16- speakers in a BTL configuration at 500 mW per channel.
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass/treble/midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates.The stereo-audio analog-to-digital converter (ADC) supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.
The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left-/right-justified, DSP, or TDM modes.A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.
The TLV320AIC31 operates from an analog supply of2.7 V to 3.6 V, a digital core supply of 1.65 Vto 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V.The device is available in a 5 × 5 mm, 32-lead QFN package.

特性 Features

? Stereo Audio DAC:
- 100-dB (A-Weighted) Signal-to-Noise Ratio
? 16-/20-/24-/32-Bit Data
? Supports Rates From 8 kHz to 96 kHz
? 3D/Bass/Treble/EQ/De-Emphasis Effects
? Stereo Audio ADC:
- 92-dB (A-Weighted) Signal-to-Noise Ratio
? Supports Rates From 8 kHz to 96 kHz
? Six Audio Input Pins:
- Two Stereo Differential/Single-Ended Inputs
? Six Audio Output Drivers:
- Stereo 8-, 500-mW/Channel Speaker Drive Capability
? Stereo Fully-Differential or Single-Ended Headphone Drivers
? Fully Differential Stereo Line Outputs
? Low Power:14-mWStereo, 48-kHz Playback With 3.3-V Analog Supply
? Programmable Input/Output Analog Gains
? Automatic Gain Control (AGC) for Recording
? Programmable Microphone Bias Level
? Programmable PLL for Flexible Clock Generation
? I2C? Control Bus
? Audio Serial Data Bus Supports I2S?, Left-/Right-Justified, DSP, and TDM Modes
? Extensive Modular Power Control
? Power Supplies:
- Analog:2.7 V to 3.6 V
? Digital Core:1.65 V to 1.95 V
? Digital I/O:1.1 V to 3.6 V
? Available Packages: 5-mm × 5-mm, 32-Pin QFN
I2C, I2S are trademarks of NXP Semiconductors. All other trademarks are the property of their respective owners.