TLV320AIC1106PWG4屬于集成電路（IC）的編解碼器。由美國德州儀器公司制造生產(chǎn)的TLV320AIC1106PWG4編解碼器編解碼器是用于通過壓縮和解壓縮來轉(zhuǎn)換數(shù)據(jù)的半導體器件。數(shù)據(jù)壓縮可提高傳輸速度并減少存儲空間。某些編解碼器提供高達 32 位的分辨率，并且分別提供多達 6 個或 8 個模數(shù)轉(zhuǎn)換器和數(shù)模轉(zhuǎn)換器。除三角積分調(diào)制外，還有 I2C、I2S、SPI、串行、HDA、S/DIF、PCM、USB、AC'97 和 SLIMbus 數(shù)據(jù)接口。

FEATURES

Designed for Analog and Digital Wireless

Handsets, Voice-Enabled Terminals, and

Telecommunications Applications

2.7-V to 3.3-V Operation

Selectable 13-Bit Linear or 8-Bit μ-Law

Companded Conversion

Differential Microphone Input With External

Gain Setting

Differential Earphone Output Capable of

Driving a 32-Ω to 8-Ω Load

Programmable Volume Control in Linear Mode

Microphone (MIC) and Earphone (EAR) Mute

Functions

Typical Power Dissipation of 0.03 mW in

Power-Down Mode

2.048-MHz Master Clock Rate

300-Hz to 3.4-kHz Passband

Low Profile 20-Terminal TSSOP Packaging

APPLICATIONS

Digital Handset

Digital Headset

Cordless Phones

Digital PABX

Digital Voice Recording

DESCRIPTION

The TLV320AIC1106 PCM codec is designed to

perform transmit encoding analog-to-digital (A/D)

conversion, receive decoding digital-to-analog (D/A)

conversion, and transmit and receive filtering for

voice-band communications systems. The

TLV320AIC1106 device operates in either the 13-bit

linear or 8-bit companded (μ-law) mode. The PCM

codec generates its own internal clocks from a

2.048-MHz master clock input.