TLV1548QDBREP屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由美國德州儀器公司制造生產(chǎn)的TLV1548QDBREP模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對模擬信號進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號。一般來說，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。

Controlled Baseline

? One Assembly Site, One Test Site, One

Fabrication Site

Extended Temperature Performance of

?40°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product-Change Notification

Qualification Pedigree?

Conversion Time ≤ 10 μs

10-Bit-Resolution ADC

Programmable Power-Down

Mode . . . 1 μA

Wide Range Single-Supply Operation of

2.7 V dc to 5.5 V dc

Analog Input Range of 0 V to VCC

Built-in Analog Multiplexer with 8 Analog

Input Channels

TMS320 DSP and Microprocessor SPI and

QSPI Compatible Serial Interfaces

End-of-Conversion (EOC) Flag

Inherent Sample-and-Hold Function

Built-In Self-Test Modes

Programmable Power and Conversion Rate

Asynchronous Start of Conversion for

Extended Sampling

Hardware I/O Clock Phase Adjust Input

description

The TLV1548 is a CMOS 10-bit switched-capacitor successive-approximation (SAR) analog-to-digital (A/D)

converter. The device has a chip select (CS), input-output clock (I/O CLK), data input (DATA IN) and serial data

output (DATA OUT) that provides a direct 4-wire synchronous serial peripheral interface (SPI?, QSPI?) port

of a host microprocessor. When interfacing with a TMS320 DSP, an additional frame sync signal (FS) indicates

the start of a serial data frame. The device allows high-speed data transfers from the host. The INV CLK input

provides further timing flexibility for the serial interface.

In addition to a high-speed converter and versatile control capability, the device has an on-chip 11-channel

multiplexer that can select any one of eight analog inputs or any one of three internal self-test voltages. The

sample-and-hold function is automatic except for the extended sampling cycle, where the sampling cycle is

started by the falling edge of asynchronous CSTART. At the end of the A/D conversion, the end-of-conversion

(EOC) output goes high to indicate that the conversion is complete. The TLV1548 is designed to operate with

a wide range of supply voltages with very low power consumption. The power saving feature is further enhanced

with a software-programmed power-down mode and conversion rate. The converter incorporated in the device

features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and

isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error

conversion over the full operating temperature range.

The TLV1548 has eight analog input channels. The TLV1548Q is characterized for operation from ?40°C to

125°C.