最新无码a∨在线观看,一本av高清一区二区三区,亚洲熟妇色l20p,宅男噜噜69av,中出あ人妻熟女中文字幕

首頁>TB3R1D1G4.B>規(guī)格書詳情

TB3R1D1G4.B中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

TB3R1D1G4.B
廠商型號

TB3R1D1G4.B

功能描述

QUAD DIFFERENTIAL PECL RECEIVERS

絲印標識

TB3R1

封裝外殼

SOIC

文件大小

317.46 Kbytes

頁面數(shù)量

13

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-8-9 10:12:00

人工找貨

TB3R1D1G4.B價格和庫存,歡迎聯(lián)系客服免費人工找貨

TB3R1D1G4.B規(guī)格書詳情

1FEATURES

? Low-Voltage Functional Replacements for the

Agere BRF1A, BRF2A, BRS2A, and BRS2B

? Pin-Equivalent to General Trade 26LS32

Devices

? High-Input Impedance Approximately 8 kΩ

? 3.5-ns Maximum Propagation Delay

? TB3R1 Provides 50-mV Hysteresis

? TB3R2 With -125-mV Threshold Offset for

Preferred State Output

? -0.5-V to 5.2-V Common Mode Range

? Single 3.3 V ±10% Supply

? Slew Rate Limited (0.5 ns min 80% to 20%)

? TB3R2 Output Defaults to Logic 1 When Inputs

Left Open or Shorted to VCC or GND

? ESD Protection HBM > 3 kV, CDM > 2 kV

? Operating Temperature Range: -40°C to 85°C

? Available SOIC (D) Package

APPLICATIONS

? Digital Data or Clock Transmission Over

Balanced Lines

DESCRIPTION

These quad differential receivers accept digital data

over balanced transmission lines. They translate

differential input logic levels to TTL output logic

levels.

The TB3R1 is a pin- and function-compatible

replacement for the Agere Systems BRF1A and

BRF2A; it includes 3-kV HBM and 2-kV CDM ESD

protection.

The TB3R2 is a pin- and function-compatible

replacement for the Agere Systems BRS2A and

BRS2B and incorporates a -125-mV receiver input

offset, preferred state output, 3-kV HBM and 2-kV

CDM ESD protection. The TB3R2 preferred state

feature places the output in the high state when the

inputs are open, shorted to ground, or shorted to the

power supply.

The power-down loading characteristics of the

receiver input circuit are approximately 8 kΩ relative to the power supplies; hence they do not load the

transmission line when the circuit is powered down.

The package for these differential line receivers is the

16-pin SOIC (D) package.

The enable inputs of this device include internal

pullup resistors of approximately 40 kΩ that are

connected to VCC to ensure a logical high level input

if the inputs are open circuited.

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
TI
2025+
SOIC-16
16000
原裝優(yōu)勢絕對有貨
詢價
Texas Instruments
24+
16-SOIC
65200
一級代理/放心采購
詢價
TI/TEXAS
23+
原廠封裝
8931
詢價
TI/德州儀器
25+
SOIC-16
30000
公司只有原裝
詢價
TI
22+
16SOIC
9000
原廠渠道,現(xiàn)貨配單
詢價
TI
23+
N/A
7560
原廠原裝
詢價
TI
16+
SOIC
10000
原裝正品
詢價
TI
20+
NA
53650
TI原裝主營-可開原型號增稅票
詢價
TI/德州儀器
24+
SMD-7.2mm
80000
只做正品原裝現(xiàn)貨
詢價
TI(德州儀器)
24+
SOIC-16
10000
現(xiàn)貨
詢價