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SY100S838LZITR中文資料麥瑞半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
SY100S838LZITR |
功能描述 | (?1, ?2/3) OR (?2, ?4/6) CLOCK GENERATION CHIP |
文件大小 |
73.62 Kbytes |
頁面數(shù)量 |
4 頁 |
生產(chǎn)廠商 | Micrel Semiconductor |
企業(yè)簡稱 |
MICREL【麥瑞半導(dǎo)體】 |
中文名稱 | 麥瑞半導(dǎo)體官網(wǎng) |
原廠標(biāo)識 | MICREL |
數(shù)據(jù)手冊 | |
更新時間 | 2025-8-6 11:16:00 |
人工找貨 | SY100S838LZITR價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SY100S838LZITR規(guī)格書詳情
DESCRIPTION
The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, by using the VBB output, a sinusoidal source can be ACcoupled into the device.
FEATURES
■ 3.3V and 5V power supply options
■ 50ps output-to-output skew
■ Synchronous enable/disable
■ Master Reset for synchronization
■ Internal 75K? input pull-down resistors
■ Available in 20-pin SOIC package
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
SYERGY |
24+ |
SOP |
9600 |
原裝現(xiàn)貨,優(yōu)勢供應(yīng),支持實(shí)單! |
詢價 | ||
SYNERGY |
23+ |
SOP20 |
11200 |
原廠授權(quán)一級代理、全球訂貨優(yōu)勢渠道、可提供一站式BO |
詢價 | ||
SYNERGY |
NA |
8560 |
一級代理 原裝正品假一罰十價格優(yōu)勢長期供貨 |
詢價 | |||
SYNERGY |
20+ |
SMD |
32500 |
現(xiàn)貨很近!原廠很遠(yuǎn)!只做原裝 |
詢價 | ||
SYNERGY |
23+ |
SOP |
6000 |
原裝正品假一罰百!可開增票! |
詢價 | ||
恒佳興 |
23+ |
23 |
69820 |
終端可以免費(fèi)供樣,支持BOM配單! |
詢價 | ||
SYNERGY |
2447 |
SOP |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價 | ||
Microchip |
23+ |
2017-MI |
21500 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
SYNERGY |
2022+ |
SMD |
30000 |
進(jìn)口原裝現(xiàn)貨供應(yīng),原裝 假一罰十 |
詢價 | ||
Microchip |
22+ |
20SOIC |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價 |