DESCRIPTION

The SY100S336 functions either as a modulo-16 up/down counter or as a 4-bit bidirectional shift register and is designed for use in high-performance ECL systems. Three Select inputs (Sn) are provided for determining the mode of operation. The Function Table lists the available modes of operation.

FEATURES

■ Max. shift frequency of 700MHz

■ Clock to Q delay max. of 1100ps

■ IEE min. of –170mA

■ Internal 75K? input pull-down resistors

■ Industry standard 100K ECL levels

■ Extended supply voltage option: VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved noise immunity

■ 50 faster than Fairchild 300K at lower power

■ Function and pinout compatible with Fairchild F100K

■ Available in 24-pin CERPACK and 28-pin PLCC packages