STA013屬于集成電路（IC）的編碼器解碼器轉(zhuǎn)換器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的STA013編碼器，解碼器，轉(zhuǎn)換器該系列產(chǎn)品可用于將信息封裝或編碼為適合于傳輸或存儲(chǔ)的格式，和/或在通信路徑的另一端執(zhí)行逆運(yùn)算，通常是通過(guò)使用某些形式的調(diào)制過(guò)程。示例包括從數(shù)字?jǐn)?shù)據(jù)生成模擬視頻信號(hào)的器件（反之亦然）；基于傳輸目的對(duì)按鈕的狀態(tài)進(jìn)行編碼的器件（實(shí)現(xiàn)遠(yuǎn)程控制功能）；以及便于將標(biāo)準(zhǔn) UART 連接到標(biāo)準(zhǔn)紅外收發(fā)器的器件。

DESCRIPTION

The STA013 is a fully integrated high flexibility MPEG Layer III Audio Decoder, capable of decoding Layer III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

■ SINGLE CHIP MPEG2 LAYER 3 DECODER

SUPPORTING:

- All features specified for Layer III in ISO/IEC

11172-3 (MPEG 1 Audio)

- All features specified for Layer III in ISO/IEC

13818-3.2 (MPEG 2 Audio)

- Lower sampling frequencies syntax extension,

(not specified by ISO) called MPEG 2.5

■ DECODES LAYER III STEREO CHANNELS,

DUAL CHANNEL, SINGLE CHANNEL

(MONO)

■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING

FREQUENCIES AND THE EXTENSION TO MPEG 2.5:

48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz

■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH

DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s

■ DIGITAL VOLUME CONTROL

■ DIGITAL BASS & TREBLE CONTROL

■ SERIAL BITSTREAM INPUT INTERFACE

■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.

■ SERIAL PCM OUTPUT INTERFACE (I2S

AND OTHER FORMATS)

PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION

■ LOW POWER CONSUMPTION:

85mW AT 2.4V

■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION

WITH SOFTWARE INDICATORS

■ I2C CONTROL BUS

■ LOW POWER 3.3V CMOS TECHNOLOGY

■ 10 MHz, 14.31818 MHz, OR 14.7456 MHz

EXTERNAL INPUT CLOCK OR BUILT-IN INDUSTRY STANDARD

XTAL OSCILLATOR DIFFERENT FREQUENCIES MAY BE

SUPPORTED UPON REQUEST TO STM

APPLICATIONS

■ PC SOUND CARDS

■ MULTIMEDIA PLAYERS