ST8024CDR屬于集成電路（IC）的專用。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的ST8024CDR專用該系列產(chǎn)品可提供所需的功能，用以將信息源/信宿連到各種復(fù)雜或范圍狹窄應(yīng)用中的傳感器、變送器、致動器、傳輸介質(zhì)或其他此類端點(diǎn)。例如，汽車安全氣囊驅(qū)動器、車身控制和信息娛樂總線、自適應(yīng)電纜均衡器、智能卡等等。

描述 Description

The ST8024 is a complete low cost analog interface for asynchronous 3 V and 5 V smart cards. It can be placed between the card and the microcontroller with few external components to perform all supply protection and control functions. ST8024 is a direct replacement of ST8004.

特性 Features

■ Designed to be compatible with the NDS conditional access system

■ IC card interface

■ 3 or 5 V supply for the IC (VDDand GND)

■ Three specifically protected half-duplex bidirectional buffered I/O lines to card contacts C4, C7 and C8

■ DC-DC converter for VCC generation separately powered from a 5 V ± 20 supply (VDDPand PGND)

■ 3 or 5 V ± 5 regulated card supply voltage (VCC) with appropriate decoupling has the following capabilities:

–ICC< 80 mA at VDDP= 4 to 6.5 V

– Handles current spikes of 40 nA up to 20 MHz

– Controls rise and fall times

– Filtered overload detection at approximately 120 mA

■ Thermal and short-circuit protection on all card contacts

■ Automatic activation and deactivation sequences; initiated by software or by hardware in the event of a short-circuit, card

take-off, overheating, VDDor VDDPdrop-out ■ Enhanced ESD protection on card side (>6 kV)

■ 26 MHz integrated crystal oscillator

■ Clock generation for cards up to 20 MHz (divided by 1, 2, 4 or 8 through CLKDIV1 and CLKDIV2 signals) with synchronous frequency changes

■ Non-inverted control of RST via pin RSTIN

■ ISO 7816, GSM11.11 and EMV (payment systems) compatibility

■ Supply supervisor for spike-killing during power-on and power-off and power-on reset (threshold fixed internally or externally by a resistor bridge)

■ Built-in debounce on card presence contacts

■ One multiplexed status signal off