DESCRIPTION

The SSTL16877 is a 14-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V. VDDQ must not exceed VCC. Inputs are SSTL_2 type with VREF normally at 0.5*VDDQ. The outputs support class I which can be used for standard stub-series applications or capacitive loads. Master reset (RESET) asynchronously resets all registers to zero.

FEATURES

? Stub-series terminated logic for 2.5 V VDDQ (SSTL_2)

? Optimized for DDR (Double Data Rate) SDRAM applications

? Supports SSTL_2 signal inputs and outputs

? Flow-through architecture optimizes PCB layout

? Meets SSTL_2 class I and class II specifications

? Latch-up protection exceeds 500mA per JEDEC Std 17

? ESD protection exceeds 2000 V per MIL STD 833 Method 3015

and 200 V per Machine Model

? Full DDR solution provided when used with PCK877 and CBT3867