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SPC5777CDK3MME4

NXP 32-bit MCU, Power Arch cores, 8MB Flash, 300MHz, -40/+125degC, Automotive Grade, 416 MAP; ? Two independent Power Architecture z7 cores with up to 300 MHz operation\n? Single z7 core in Lockstep with one of the main cores\n? 8M Flash\n? 512kB total SRAM\n? 3 eTPU2 timers with 96 channels\n? eMIOS timer with 32 channels\n? Ethernet 10/100\n? Four Sigma Delta and four eQADC converters\n? Built to support functional safety (ISO 26262/ASIL-D)\n? 416 and 516 BGA\n? -40 to 125C Ta Operation\n;

The MPC5777C Power Architecture? MCU targets industrial and automotive engine control applications that require advanced performance, timing systems, security, and functional safety capabilities. The family offers a high-performance multicore architecture with industry standard eTPU based timer system. A Flash offering that supports code expansion, a security module, and packaging options are available along with the highest level of functional safety (ASIL-D) support.\n