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SN74LVTH16245ADLR.B中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

SN74LVTH16245ADLR.B
廠商型號(hào)

SN74LVTH16245ADLR.B

功能描述

3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

文件大小

525.9 Kbytes

頁面數(shù)量

21

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-10 11:10:00

人工找貨

SN74LVTH16245ADLR.B價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

SN74LVTH16245ADLR.B規(guī)格書詳情

FEATURES

· Members of the Texas Instruments Widebus?

Family

· State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V Operation

and Low Static-Power Dissipation

· Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

· Support Unregulated Battery Operation Down

to 2.7 V

· Typical VOLP (Output Ground Bounce) <0.8 V

at VCC = 3.3 V, TA = 25°C

· Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

· Flow-Through Architecture Optimizes PCB

Layout

· Ioff and Power-Up 3-State Support Hot

Insertion

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Latch-Up Performance Exceeds 500 mA Per

JESD 17

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

DESCRIPTION/ORDERING INFORMATION

The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage

(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The devices are designed for asynchronous communication between two data buses. The logic levels of the

direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port

outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to

the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are

activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level

applied to prevent excess ICC and ICCZ.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown

resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
TI/德州儀器
23+
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11200
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23+
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25+
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22+
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9000
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24+
BGA56
748
只供應(yīng)原裝正品 歡迎詢價(jià)
詢價(jià)
TI
23+24
SSOP7.8
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24+
56-BGA MICROSTAR JUNIOR(7.0x4
65200
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TI/德州儀器
21+
56BGA
6000
全新原裝 現(xiàn)貨 價(jià)優(yōu)
詢價(jià)
TI
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TSSOP48
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24+
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690000
代理渠道/支持實(shí)單/只做原裝
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