首頁>SN74LVTH16245ADGVR.B>規(guī)格書詳情
SN74LVTH16245ADGVR.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
SN74LVTH16245ADGVR.B |
功能描述 | 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
絲印標(biāo)識(shí) | |
封裝外殼 | TVSOP |
文件大小 |
525.9 Kbytes |
頁面數(shù)量 |
21 頁 |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡稱 |
TI2【德州儀器】 |
中文名稱 | 美國德州儀器公司官網(wǎng) |
原廠標(biāo)識(shí) | TI2 |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-4 12:13:00 |
人工找貨 | SN74LVTH16245ADGVR.B價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
相關(guān)芯片規(guī)格書
更多- SN74LVTH16245ADGVR
- SN74LVTH16245ADGGR
- SN74LVTH16245ADGGR
- SN74LVTH16245A
- SN74LVTH16245A
- SN74LVTH16245ADGVR
- SN74LVTH16245ADGGR
- SN74LVTH16245A
- SN74LVTH16245ADGVR
- SN74LVTH16245ADGVR
- SN74LVTH16245ADGGR
- SN74LVTH16245ADGVR
- SN74LVTH16245ADGGR
- SN74LVTH16245A
- SN74LVTH16245ADGGR
- SN74LVTH16245A
- SN74LVTH16245ADGVR
- SN74LVTH16245A
SN74LVTH16245ADGVR.B規(guī)格書詳情
FEATURES
· Members of the Texas Instruments Widebus?
Family
· State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
· Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
· Support Unregulated Battery Operation Down
to 2.7 V
· Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
· Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
· Flow-Through Architecture Optimizes PCB
Layout
· Ioff and Power-Up 3-State Support Hot
Insertion
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· Latch-Up Performance Exceeds 500 mA Per
JESD 17
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices are designed for asynchronous communication between two data buses. The logic levels of the
direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI(德州儀器) |
2021+ |
SSOP-48 |
499 |
詢價(jià) | |||
TI |
2016+ |
SSOP48 |
6523 |
只做進(jìn)口原裝現(xiàn)貨!假一賠十! |
詢價(jià) | ||
TI |
24+ |
SOP |
30000 |
原裝正品公司現(xiàn)貨,假一賠十! |
詢價(jià) | ||
TI |
24+ |
SOP |
6000 |
全新原裝深圳倉庫現(xiàn)貨有單必成 |
詢價(jià) | ||
TI |
24+ |
TSSOP48
|
600 |
“芯達(dá)集團(tuán)”專營軍工百分之百原裝進(jìn)口 |
詢價(jià) | ||
TI |
21+ |
SOP |
12588 |
原裝正品,量大可定 |
詢價(jià) | ||
RHTI |
三年內(nèi) |
1983 |
只做原裝正品 |
詢價(jià) | |||
TI/德州儀器 |
2447 |
SSOP |
100500 |
一級(jí)代理專營品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長期排單到貨 |
詢價(jià) | ||
TI |
23+ |
SOP |
12800 |
正規(guī)渠道,只有原裝! |
詢價(jià) | ||
TI/德州儀器 |
23+ |
SSOP-48 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) |