SN74LVCH16952ADGGR屬于集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74LVCH16952ADGGR緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

FEATURES

· Member of the Texas Instruments Widebus?

Family

· Operates From 1.65 V to 3.6 V

· Inputs Accept Voltages to 5.5 V

· Max tpd of 6.6 ns at 3.3 V

· Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

· Typical VOHV (Output VOH Undershoot)

>2 V at VCC = 3.3 V, TA = 25°C

· Supports Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage

With 3.3-V VCC)

· Ioff Supports Partial-Power-Down Mode

Operation

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This 16-bit registered transceiver is designed for

1.65-V to 3.6-V VCC operation.

The SN74LVCH16952A contains two sets of D-type

flip-flops for temporary storage of data flowing in

either direction. The device can be used as two 8-bit

transceivers or one 16-bit transceiver. Data on the A

or B bus is stored in the registers on the low-to-high

transition of the clock (CLKAB or CLKBA) input,

provided that the clock-enable (CEAB or CEBA) input

is low. Taking the output-enable (OEAB or OEBA)

input low accesses the data on either port.