1 Features

? Operating range from 1.1V to 3.6V

? Over-voltage tolerant inputs support up to 5.5V

independent of VCC

? Supports partial-power-down with back drive

protection (Ioff)

? High push-pull output drive strength:

– ±24mA at 3.3V

– ±8mA at 2.3V

– ±4mA at 1.65V

? Maximum propagation delay of 7ns at 3.3V supply

? Latch-up performance exceeds 100mA

per JESD78

2 Applications

? Convert a momentary switch to a toggle switch

? Divide a clock signal by 2 or 4

3 Description

The SN74LVC2G101 contains two independent Dtype

flip-flops. Each channel has data (D), clear

(CLR), and clock (CLKA, CLKB, CLKC, CLKD) inputs

and a non-inverted output (Q). The clock inputs can

be configured for use in a wide variety of applications,

allowing for configuration as 2-input AND, OR, NAND,

NOR, XOR, XNOR, as well as 1-input inverted or noninverted

operation. All inputs include Schmitt-trigger

architecture.