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SN74LVC161284DLR.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
SN74LVC161284DLR.A |
功能描述 | 19-BIT BUS INTERFACE |
文件大小 |
507.73 Kbytes |
頁(yè)面數(shù)量 |
19 頁(yè) |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡(jiǎn)稱 |
TI2【德州儀器】 |
中文名稱 | 美國(guó)德州儀器公司官網(wǎng) |
原廠標(biāo)識(shí) | TI2 |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-3 11:16:00 |
人工找貨 | SN74LVC161284DLR.A價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
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1.4-kΩ Pullup Resistors Integrated on All
Open-Drain Outputs Eliminate the Need for
Discrete Resistors
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Designed for the IEEE Std 1284-I (Level 1
Type) and IEEE Std 1284-II (Level 2 Type)
Electrical Specifications
Flow-Through Architecture Optimizes PCB
Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin-Shrink
Small-Outline (DGG) Packages
description/ordering information
The SN74LVC161284 is designed for 3-V to 3.6-V
VCC operation. This device provides
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
This device has eight bidirectional bits; data can
flow in the A-to-B direction when DIR is high and
in the B-to-A direction when DIR is low. This
device also has five drivers, which drive the cable
side, and four receivers. The SN74LVC161284
has one receiver dedicated to the HOST LOGIC
line and a driver to drive the PERI LOGIC line.
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in
a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive
requirements as specified in the IEEE Std 1284-I (level 1 type) and IEEE Std 1284-II (level 2 type) parallel
peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have
a 1.4-kΩ integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low
state or if the output voltage is above VCC CABLE. If VCC CABLE is off, PERI LOGIC OUT is set to low.
The device has two supply voltages. VCC is designed for 3-V to 3.6-V operation. VCC CABLE supplies the inputs
and output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Even
when VCC CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.
The SN74LVC161284 is characterized for operation from 0°C to 70°C.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
24+ |
TSSOP48 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
TI/德州儀器 |
23+ |
SSOP48 |
11200 |
原廠授權(quán)一級(jí)代理、全球訂貨優(yōu)勢(shì)渠道、可提供一站式BO |
詢價(jià) | ||
TI/德州儀器 |
2447 |
TSSOP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
TI/德州儀器 |
23+ |
TSSOP48 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
TI |
22+ |
NA |
620 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
TI |
24+ |
TSSOP48 |
65300 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
恩XP |
25+ |
TSSOP48 |
65248 |
百分百原裝現(xiàn)貨 實(shí)單必成 |
詢價(jià) | ||
NS |
24+ |
TSSOP-48 |
20000 |
全新原廠原裝,進(jìn)口正品現(xiàn)貨,正規(guī)渠道可含稅?。?/div> |
詢價(jià) | ||
TI |
24+ |
原廠原封 |
6523 |
進(jìn)口原裝公司百分百現(xiàn)貨可出樣品 |
詢價(jià) | ||
TMS |
05+ |
SOIC |
1000 |
全新原裝 絕對(duì)有貨 |
詢價(jià) |