1 Features

? Wide operating range of 1.65V to 5.5V

? 5.5V tolerant input pins

? Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

? 1.2V to 1.8V

? 1.5V to 2.5V

? 1.8V to 3.3V

? 3.3V to 5.0V

– Down translation:

? 5.0V, 3.3V, 2.5V to 1.8V

? 5.0V, 3.3V to 2.5V

? 5.0V to 3.3V

? Up to 150Mbps with 5V or 3.3V VCC

? Supports standard function pinout

? Latch-up performance exceeds 250mA

per JESD 17

? Supports defense and aerospace applications:

– Controlled baseline

– One assembly and test site

– One fabrication site

– Extended product life cycle

– Product traceability

2 Applications

? Drive an indicator LED

? Redrive a digital signal

? Drive a transmission line

? Hold a signal during controller reset

3 Description

The SN74LV8T373-EP device is an octal transparent

D-type latch designed for 2V to 5.5V VCC operation.

The input is designed with a reduced threshold circuit

to support up translation when the supply voltage

is larger than the input voltage. Additionally, the 5V

tolerant input pins enable down translation when the

input voltage is larger than the supply voltage. The

output level is always referenced to the supply voltage

(VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS

levels.