首頁>SN74LV595B-EP>規(guī)格書詳情
SN74LV595B-EP中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
SN74LV595B-EP |
| 功能描述 | SN74LV595B-EP Enhanced Product, 2-V to 5.5-V, Low-Noise, 8-bit Shift Register With 3-State Outputs |
| 文件大小 |
897.71 Kbytes |
| 頁面數(shù)量 |
27 頁 |
| 生產(chǎn)廠商 | TI1 |
| 中文名稱 | 德州儀器 |
| 網(wǎng)址 | |
| 數(shù)據(jù)手冊 | |
| 更新時(shí)間 | 2025-8-8 16:24:00 |
| 人工找貨 | SN74LV595B-EP價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
相關(guān)芯片規(guī)格書
更多SN74LV595B-EP規(guī)格書詳情
1 Features
? 2 V to 5.5 V VCC operation
? Supports mixed-mode voltage operation on all
ports
? Ioff supports partial-power-down mode operation
? Latch-up performance exceeds 250 mA
per JESD 17
? Operating ambient temperature: -55°C to +125°C
? Supports defense, aerospace, and medical
applications:
– Controlled baseline
– One assembly and test site
– One fabrication site
– Extended product life cycle
– Product traceability
2 Applications
? Output expansion
? LED matrix control
? 7-segment display control
3 Description
The SN74LV595B-EP contains an 8-bit serial-in,
parallel-out shift register that feeds an 8-bit D-type
storage register. The storage register has parallel 3-
state outputs. Separate clocks are provided for both
the shift and storage register. The shift register has
a direct overriding clear (SRCLR) input, serial (SER)
input, and a serial output for cascading. When the
output-enable (OE) input is high, all outputs except
QH' are in the high-impedance state.
The device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables
the outputs, preventing damaging current backflow
through the device when it is powered down.
