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SN74LV2T74中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
SN74LV2T74 |
功能描述 | SN74LV2T74-Q1 Automotive Dual D-Type Flip-Flop With Integrated Translation |
文件大小 |
1.66952 Mbytes |
頁面數(shù)量 |
30 頁 |
生產(chǎn)廠商 | TI |
中文名稱 | 德州儀器 |
網(wǎng)址 | |
數(shù)據(jù)手冊 | |
更新時(shí)間 | 2025-8-14 17:25:00 |
人工找貨 | SN74LV2T74價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SN74LV2T74規(guī)格書詳情
1 Features
? AEC-Q100 qualified for automotive applications:
– Device temperature grade 1: -40°C to +125°C
– Device HBM ESD classification level 2
– Device CDM ESD classification level C4B
? Available in wettable flank QFN (WBQA) package
? Wide operating range of 1.8 V to 5.5 V
? Single-supply voltage translator (refer to LVxT
Enhanced Input Voltage):
– Up translation:
? 1.2 V to 1.8 V
? 1.5 V to 2.5 V
? 1.8 V to 3.3 V
? 3.3 V to 5.0 V
– Down translation:
? 5.0 V, 3.3 V, 2.5 V to 1.8 V
? 5.0 V, 3.3 V to 2.5 V
? 5.0 V to 3.3 V
? 5.5-V tolerant input pins
? Supports standard pinouts
? Up to 150 Mbps with 5-V or 3.3-V VCC
? Latch-up performance exceeds 250 mA
per JESD 17
2 Applications
? Convert a momentary switch to a toggle switch
? Hold a signal during controller reset
? Input slow edge-rate signals
? Operate in noisy environments
? Divide a clock signal by two
3 Description
The SN74LV2T74-Q1 contains two independent Dtype
positive-edge-triggered flip-flops. A low level at
the preset (PRE) input sets the output high. A low
level at the clear (CLR) input resets the output low.
Preset and clear functions are asynchronous and not
dependent on the levels of the other inputs. When
PRE and CLR are inactive (high), data at the data
(D) input meeting the setup time requirements is
transferred to the outputs (Q, Q) on the positive-going
edge of the clock (CLK) pulse. Clock triggering occurs
at a voltage level and is not directly related to the
rise time of the input clock (CLK) signal. Following
the hold-time interval, data at the data (D) input can
be changed without affecting the levels at the outputs
(Q, Q). The output level is referenced to the supply
voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and
5-V CMOS levels.
The input is designed with a lower threshold circuit to
support up translation for lower voltage CMOS inputs
(for example, 1.2 V input to 1.8 V output or 1.8 V input
to 3.3 V output). In addition, the 5-V tolerant input pins
enable down translation (for example, 3.3 V to 2.5 V
output).
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
25+ |
原廠封裝 |
10280 |
原廠授權(quán)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源! |
詢價(jià) | ||
TI/德州儀器 |
22+ |
TSSOP |
20000 |
原裝現(xiàn)貨,實(shí)單支持 |
詢價(jià) | ||
1000 |
原裝正品 |
詢價(jià) | |||||
TexasInstruments |
18+ |
ICQUAD2-INPUTORGATE14-SO |
6800 |
公司原裝現(xiàn)貨/歡迎來電咨詢! |
詢價(jià) | ||
TI |
24+ |
TSSOP |
2789 |
全新原裝自家現(xiàn)貨!價(jià)格優(yōu)勢! |
詢價(jià) | ||
TI |
24+ |
TSSOP |
70 |
只做原裝,歡迎詢價(jià),量大價(jià)優(yōu) |
詢價(jià) | ||
TI/德州儀器 |
24+ |
BGA |
37935 |
鄭重承諾只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
24+ |
SSOP |
500 |
本站現(xiàn)庫存 |
詢價(jià) | |||
TI |
2023+ |
3000 |
進(jìn)口原裝現(xiàn)貨 |
詢價(jià) | |||
TI/德州儀器 |
25+ |
原廠封裝 |
10280 |
詢價(jià) |