SN74LV138ATD屬于集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器。由美國(guó)德州儀器公司制造生產(chǎn)的SN74LV138ATD信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開(kāi)關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類(lèi)似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無(wú)窮變化量。

FEATURES

· Inputs Are TTL-Voltage Compatible

· 4.5-V to 5.5-V V CC Operation

· Max tpd of 7.6 ns at 5 V

· Typical V OLP (Output Ground Bounce)

<0.8 V at VCC = 5 V, TA = 25°C

· Typical V OHV (Output VOH Undershoot)

>2.3 V at VCC = 5 V, TA = 25°C

· Support Mixed-Mode Voltage Operation on All

Ports

· Ioff Supports Partial-Power Down Mode

Operation

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The SN74LV138AT is a 3-line to 8-line decoder/demultiplexer, designed for high-performance memory-decoding

or data-routing applications requiring very short propagation delay times. In high-performance memory systems,

this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories

utilizing a fast enable circuit, the delay times of the decoder and the enable time of the memory usually are less

than the typical access time of the memory. This means that the effective system delay introduced by the

decoder is negligible.