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SN74LS27

3 通道、3 輸入、4.75V 至 5.25V 雙極或非門; ? Package Options Include Plastic “Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n? Dependable Texas Instruments Quality and Reliability;

These devices contain three independent 3-input NOR gates. The SN5427 and SN54LS27 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7427 and SN74LS27 are characterized for operation from 0°C to 70°C. ?

SN74LS27

TRIPLE 3-INPUT POSITIVE-NOR GATES

SN74LS27

TRIPLE 3-INPUT POSITVE-NOR GATES

SN74LS273

LOW POWER SCHOTTKY

TheSN74LS273isahigh-speed8-BitRegister.TheregisterconsistsofeightD-TypeFlip-FlopswithaCommonClockandanasynchronousactiveLOWMasterReset.Thisdeviceissuppliedina20-pinpackagefeaturing0.3inchleadspacing. ?8-BitHighSpeedRegister ?ParallelRegister ?CommonC

SN74LS273

OCTAL D-TYPE FLIP-FLOP WITH CLEAR

?ContainsEightFlip-FlopsWithSingle-Rail Outputs ?BufferedClockandDirectClearInputs ?IndividualDataInputtoEachFlip-Flop ?ApplicationsInclude: Buffer/StorageRegisters ShiftRegisters PatternGenerators description Thesemonolithic,positive-edge-triggeredflipflops ut

SN74LS273

Octal D flip-flop with clear;

The SN54/74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing.? 8-Bit High Speed Register\n? Parallel Register\n? Common Clock and Master Reset\n? Input Clamp Diodes Limit High-Speed Termination Effects

SN74LS273

具有清零端的八路 D 型觸發(fā)器; ? Contains Eight Flip-Flops With Single-Rail Outputs \n? Buffered Clock and Direct Clear Inputs \n? Individual Data Input to Each Flip-Flop \n? Applications Include: \n? Buffer/Storage Registers \n? Shift Registers \n? Pattern Generators;

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ′273 and 10 milliwatts for the ′LS273.???

SN74LS273DW

OCTAL D FLIP-FLOP WITH CLEAR

TheSN54/74LS273isahigh-speed8-BitRegister.TheregisterconsistsofeightD-TypeFlip-FlopswithaCommonClockandanasynchronousactiveLOWMasterReset.Thisdeviceissuppliedina20-pinpackagefeaturing0.3inchleadspacing. ?8-BitHighSpeedRegister ?ParallelRegister ?Commo

SN74LS273DW

LOW POWER SCHOTTKY

TheSN74LS273isahigh-speed8-BitRegister.TheregisterconsistsofeightD-TypeFlip-FlopswithaCommonClockandanasynchronousactiveLOWMasterReset.Thisdeviceissuppliedina20-pinpackagefeaturing0.3inchleadspacing. ?8-BitHighSpeedRegister ?ParallelRegister ?CommonC

SN74LS273DW

OCTAL D-TYPE FLIP-FLOP WITH CLEAR

?ContainsEightFlip-FlopsWithSingle-Rail Outputs ?BufferedClockandDirectClearInputs ?IndividualDataInputtoEachFlip-Flop ?ApplicationsInclude: Buffer/StorageRegisters ShiftRegisters PatternGenerators description Thesemonolithic,positive-edge-triggeredflipflops ut